Commit Graph

66 Commits

Author SHA1 Message Date
Stefan Kalkowski af29dcf557 hw: introduce virtualization support for ARMv8
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski 02d68fdb97 hw: move arm virtualization to generic place
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski 87a6368ba1 hw: implement multi-processor support for rpi3
Fix #3522
2019-11-19 14:42:22 +01:00
Stefan Kalkowski 1cbd77c806 hw: implement multi-processor support for i.MX8
Fix #3520
2019-11-19 14:42:22 +01:00
Stefan Kalkowski 7ced122ddc hw: support for i.MX8M Quad EVK
Fix #3426
2019-08-13 12:02:27 +02:00
Stefan Kalkowski fa1aa33f83 hw: sanitize arm trustzone/virtualization services
Those services are not SoC specific and have to reside at a generic place.

Fix #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski 907de9d37f hw: move timer into board.h
Unify the generic timer implementation for ARMv7 and ARMv8.

Ref #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski 0b77e8ea62 hw: consistently move cpu into board namespace
Ref #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski 875858b2cc hw: integrate interrupt controllers into board.h
Additionally, unify more implementation details in between different
usage patterns of ARM's generic interrupt controller (v2)

Ref #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski 90d07741aa hw: support for ARM64 Raspberry Pi 3
Restriction: enables only cpu core 0 and the timer interrupt by now.

Fix #3405
2019-07-09 08:55:22 +02:00
Sebastian Sumpf da17f2cbd3 hw: eager FPU switching for x86_64
Since gcc 8.3.0 generates SSE instructions into kernel code, the
kernel itself may raise FPU exceptions and/or corrupt user level FPU
contexts thereby. Both things are not feasible, and therefore, lazy FPU
switching becomes a no go for base-hw because we cannot avoid FPU
instructions because of the entanglement of base-hw, base, and the tool
chain (libgcc_eh.a).

issue #3365
2019-05-27 14:53:32 +02:00
Stefan Kalkowski a1e70b9ba4 kernel: differentiate board-specific components
Components like kernel, core, and bootstrap that are built for a
specific board need to reside inside the same architectural dependent
build directory. For instance there are sel4, foc, and hw kernel builds
for imx6q_sabrelite and imx7d_sabre, which have to reside inside the same
arm_v7 build directory.
This commit names those components explicitely, and adapts the run-tool to it.

Fix #3316
2019-05-27 14:46:52 +02:00
Alexander Boettcher 450c8dc149 vm_session: track dataspaces used by attach
Track the dataspaces used by attach and add handling of flushing VM space
when dataspace gets destroyed (not triggered via the vm_session interface).

Issue #3111
2019-05-06 16:15:25 +02:00
Stefan Kalkowski baf815d099 hw: add support for i.MX7 Dual SABRE board
Fix #3251
2019-04-01 19:33:49 +02:00
Stefan Kalkowski 3725e91603 hw: implement power-saving kernel lock for ARM smp
Thanks to former work of Martin Stein this commit finally incorporates a
non-spinning kernel lock on multi-core ARM platforms.

Fix #1313
2019-04-01 19:33:47 +02:00
Stefan Kalkowski e9b3569f44 hw: remove overall cache maintainance from core
This functionality is only needed in bootstrap now that kernel and
userland share the same address-space.

Fix #2699
2019-04-01 19:33:46 +02:00
Stefan Kalkowski 822a6e7c5f hw_riscv: strictly separate machine and syscall ids
Fix #3230
2019-03-18 15:56:59 +01:00
Stefan Kalkowski 55b0dff795 hw: add board support for Nitrogen6 SoloX 2019-02-26 14:45:31 +01:00
Stefan Kalkowski 7ffc480db8 hw: avoid code duplication for imx6 initialization
This is preliminary work to move the Wandboard to and add the
Nitrogen6 SX board to the world repository.

Ref #3168
2019-02-26 14:45:31 +01:00
Stefan Kalkowski c65860ee53 enable i.MX6 Quad Sabrelite board for hw and foc 2019-01-30 13:35:28 +01:00
Stefan Kalkowski 8e13b376b0 hw: improve cross-cpu synchronization
This commit addresses several multiprocessing issues in base-hw:

* it reworks cross-cpu maintainance work for TLB invalidation by
  introducing a generic Inter_processor_work and removes the so
  called Cpu_domain_update
* thereby it solves the cross-cpu thread destruction, when the
  corresponding thread is active on another cpu (fix #3043)
* it adds the missing TLB shootdown for x86 (fix #3042)
* on ARM it removes the TLB shootdown via IPIs, because this
  is not needed on the multiprocessing ARM platforms we support
* it enables the per-cpu initialization of the kernel's cpu
  objects, which means those object initialization is executed
  by the proper cpu
* it rollbacks prior decision to make multiprocessing an aspect,
  but puts back certain 'smp' mechanisms (like cross-cpu lock)
  into the generic code base for simplicity reasons
2019-01-07 12:25:44 +01:00
Stefan Kalkowski d7fa4cfb8b hw: enable eager FPU context switch for ARM
* Add an ieee754 FPU test
* Remove simple fpu test

Fix #2822
2018-11-29 11:54:31 +01:00
Alexander Boettcher cf3ff17c50 hw/x86: enable SMP support
Fixes #2929
2018-08-28 16:48:44 +02:00
Stefan Kalkowski 68015a6e9d base: remove cortex* compiler flags (fix #2787) 2018-05-03 15:32:01 +02:00
Johannes Schlatow bfe0031304 base-hw: enable SMP support for Zynq-7000 boards
Issue #2641
2018-02-09 13:34:19 +01:00
Johannes Schlatow d4a75ed9bb base-hw: move spec/zynq files to zynq_qemu
This is necessary because in contrast to the zynq boards (see specs in genode-world), only zynq_qemu uses UART_0.
These files should thus fall under the zynq_qemu spec.

Fixes #2615
2017-12-21 15:01:51 +01:00
Christian Helmuth 4112037c0c hw: fix building usb_armory
This removes cpu_trustzone.cc (which was removed in
d6a05245f2) from the build dependencies.

Issue #2540
2017-11-30 11:23:11 +01:00
Stefan Kalkowski d6a05245f2 hw: remove User_context
Fix #2540
2017-11-06 13:57:20 +01:00
Stefan Kalkowski 0635d5fffb hw: turn Cpu_idle into a Thread
Fix #2539
2017-11-06 13:57:20 +01:00
Stefan Kalkowski 84331ac0f7 hw: remove obsolete Kernel::Cpu_context
Due to the changes when fixing issue #2091 the Kernel::Cpu_context
became superfluent and is not used anymore.

Fix #2538
2017-11-06 13:57:20 +01:00
Stefan Kalkowski 4e97a6511b hw: switch page-tables only when necessary
* Instead of always re-load page-tables when a thread context is switched
  only do this when another user PD's thread is the next target,
  core-threads are always executed within the last PD's page-table set
* remove the concept of the mode transition
* instead map the exception vector once in bootstrap code into kernel's
  memory segment
* when a new page directory is constructed for a user PD, copy over the
  top-level kernel segment entries on RISCV and X86, on ARM we use a designated
  page directory register for the kernel segment
* transfer the current CPU id from bootstrap to core/kernel in a register
  to ease first stack address calculation
* align cpu context member of threads and vms, because of x86 constraints
  regarding the stack-pointer loading
* introduce Align_at template for members with alignment constraints
* let the x86 hardware do part of the context saving in ISS, by passing
  the thread context into the TSS before leaving to user-land
* use one exception vector for all ARM platforms including Arm_v6

Fix #2091
2017-10-19 13:31:18 +02:00
Stefan Kalkowski 42db1e112b hw: introduce kernel/user address space split
* introduces central memory map for core/kernel
* on 32-bit platforms the kernel/core starts at 0x80000000
* on 64-bit platforms the kernel/core starts at 0xffffffc000000000
* mark kernel/core mappings as global ones (tagged TLB)
* move the exception vector to begin of core's binary,
  thereby bootstrap knows from where to map it appropriately
* do not map boot modules into core anymore
* constrain core's virtual heap memory area
* differentiate in between user's and core's main thread's UTCB,
  which now resides inside the kernel segment

Ref #2091
2017-10-19 13:31:17 +02:00
Sebastian Sumpf c3cf7f3c3a riscv: ISA-1.9.1 and GCC-6.3.0 adaptions
Adds 1.9.1 support to base-hw

Note:
* the kernel timer is not working
* dynamic linking is currently not supported
2017-05-31 13:16:24 +02:00
Sebastian Sumpf 6c95eb9aff base-hw: RISC-V BBL
The Berkley Boot Loader handles kernel loading and machine mode
2017-05-31 13:16:24 +02:00
Sebastian Sumpf 496671e523 gcc: RISC-V 6.3.0
issue #2423
2017-05-31 13:16:20 +02:00
Stefan Kalkowski b58b69515c Remove UART specific SPEC identifiers (Ref #2403) 2017-05-31 13:16:10 +02:00
Stefan Kalkowski 6106e64aac base: remove include/spec/* other than ISA
This commit moves the headers residing in `repos/base/include/spec/*/drivers`
to `repos/base/include/drivers/defs` or repos/base/include/drivers/uart`
respectively. The first one contains definitions about board-specific MMIO
iand RAM addresses, or IRQ lines. While the latter contains device driver
code for UART devices. Those definitions are used by driver implementations
in `repos/base-hw`, `repos/os`, and `repos/dde-linux`, which now need to
include them more explicitely.

This work is a step in the direction of reducing 'SPEC' identifiers overall.

Ref #2403
2017-05-31 13:16:01 +02:00
Stefan Kalkowski b9549e58d0 hw: cleanup core code (Ref #2394) 2017-05-31 13:15:53 +02:00
Stefan Kalkowski 76bc2b9e89 hw: remove core internal header directories
Fix #2393
2017-05-31 13:15:52 +02:00
Stefan Kalkowski 67ba7b89a7 hw: separate bootstrap and core strictly
* Introduce Hw namespace and library files under src/lib/hw
* Introduce Bootstrap namespace
* Move all initialization logic into Bootstrap namespace

Ref #2388
2017-05-31 13:15:52 +02:00
Stefan Kalkowski cf943dac65 hw: bootstrap into kernel
Put the initialization of the cpu cores, setup of page-tables, enabling of
MMU and caches into a separate component that is only used to bootstrap
the kernel resp. core.

Ref #2092
2017-02-23 14:54:42 +01:00
Stefan Kalkowski b6490e913f hw_x86_64: assemble TSS and IDT statically
* remove alignment restrictions of code64 entrypoint

Ref #2092
2017-02-07 19:20:30 +01:00
Stefan Kalkowski c76c199f8d hw: enable SMP for Wandboard (fix #2253) 2017-01-31 12:01:16 +01:00
Reto Buerki 0938d69192 muen: Build sinfo code as static sinfo-muen library
And link it with core and virtualbox.
2017-01-20 16:47:00 +01:00
Stefan Kalkowski 658547d058 hw: remove core/ARM specific aspect perf_counter
This aspect was always enabled when creating a build directory for hw,
but is not enabled anymore due to recent build directory unifications.
On the other hand it is needed for jitter entropy anyway.

Ref #2190
2017-01-13 13:06:56 +01:00
Stefan Kalkowski 3886686b83 hw: get rid of global makefiles specific to hw
This commit mostly removes the globally visible NR_OF_CPUS define
from the global makefile specifiers defined in the base-hw repository.
Whereever necessary it adds platform specific makefiles to the base
repository when they were missing.

Ref #2190
2017-01-13 13:06:55 +01:00
Norman Feske c450ddcb3d Disambiguate kernel-specific file names
This patch removes possible ambiguities with respect to the naming of
kernel-dependent binaries and libraries. It also removes the use of
kernel-specific global side effects from the build system. The reach of
kernel-specific peculiarities has thereby become limited to the actual
users of the respective 'syscall-<kernel>' libraries.

Kernel-specific build artifacts are no longer generated at magic places
within the build directory (like okl4's includes, or the L4 build
directories of L4/Fiasco and Fiasco.OC, or the build directories of
various kernels). Instead, such artifacts have been largely moved to the
libcache. E.g., the former '<build-dir>/l4/' build directory for the L4
build system resides at '<build-dir>/var/libcache/syscall-foc/build/'.
This way, the location is unique to the kernel. Note that various tools
are still generated somewhat arbitrarily under '<build-dir>/tool/' as
there is no proper formalism for building host tools yet.

As the result of this work, it has become possible to use a joint Genode
build directory that is usable with all kernels of a given hardware
platform. E.g., on x86_32, one can now seamlessly switch between linux,
nova, sel4, okl4, fiasco, foc, and pistachio without rebuilding any
components except for core, the kernel, the dynamic linker, and the timer
driver. At the current stage, such a build directory must still be
created manually. A change of the 'create_builddir' tool will follow to
make this feature easily available.

This patch also simplifies various 'run/boot_dir' plugins by removing
the option for an externally hosted kernel. This option remained unused
for many years now.

Issue #2190
2016-12-23 16:51:32 +01:00
Norman Feske f54c85e045 Genode application binary interface (ABI)
This patch decouples the kernel-specific implementation of the dynamic
linker from its kernel-agnostic binary interface. The name of the
kernel-specific dynamic linker binary now corresponds to the kernel,
e.g., 'ld-linux.lib.so' or 'ld-nova.lib.so'. Applications are no longer
linked directly against a concrete instance of the dynamic linker but
against a shallow stub called 'ld.lib.so'. This stub contains nothing
but the symbols provided by the dynamic linker. It thereby represents
the Genode ABI.

At system-integration time, the kernel-specific run/boot_dir back ends
integrate the matching the kernel-specific variant of the dynamic linker
as 'ld.lib.so' into the boot image.

The ABI symbol file for the dynamic linker is located at
'base/lib/symbols/ld'. It contains the joint ABI of all supported
architectures. The new utility 'tool/abi_symbols' eases the creation of
such an ABI symbol file for a given shared library. Its result should be
manually inspected and edited as needed.

The patch removes the 'syscall' library from 'base_libs.mk' to avoid
polluting the kernel-agnostic ABI with kernel-specific interfaces.

Issue #2190
Issue #2195
2016-12-23 16:50:28 +01:00
Norman Feske ccffbb0dfc Build dynamically linked executables by default
Fixes #2184
2016-12-14 11:22:27 +01:00
Stefan Kalkowski 7841058320 hw: only use x86_64 specifier instead of x86
Fix #2109
2016-10-21 12:39:31 +02:00