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hw: remove obsolete Kernel::Cpu_context 

Due to the changes when fixing issue #2091 the Kernel::Cpu_context
became superfluent and is not used anymore.

Fix #2538
This commit is contained in:
Stefan Kalkowski 2017-10-05 11:49:57 +02:00 committed by Christian Helmuth
parent e532fc83b6
commit 84331ac0f7
20 changed files with 4 additions and 161 deletions
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1
repos/base-hw/lib/mk/spec/arm_v6/core-hw.inc
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@ -11,7 +11,6 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_v6
# add C++ sources
SRC_CC += spec/arm_v6/cpu.cc
SRC_CC += spec/arm_v6/perf_counter.cc
SRC_CC += spec/arm/kernel/cpu_context.cc
SRC_CC += spec/arm/kernel/cpu.cc
SRC_CC += spec/arm/kernel/thread_update_pd.cc
SRC_CC += kernel/vm_thread_off.cc

1
repos/base-hw/lib/mk/spec/arndale/core-hw.mk
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@ -13,7 +13,6 @@ SRC_CC += spec/arm_gic/pic.cc
SRC_CC += spec/arndale/platform_services.cc
SRC_CC += kernel/vm_thread_on.cc
SRC_CC += spec/arm_v7/virtualization/kernel/vm.cc
SRC_CC += spec/arm_v7/virtualization/kernel/cpu_context.cc
SRC_CC += spec/arm_v7/vm_session_component.cc
SRC_CC += spec/arm_v7/virtualization/vm_session_component.cc

1
repos/base-hw/lib/mk/spec/cortex_a15/core-hw.inc
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@ -12,7 +12,6 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_gic
SRC_CC += spec/cortex_a15/kernel/cpu.cc
SRC_CC += spec/arm/smp/kernel/thread_update_pd.cc
SRC_CC += spec/arm/smp/kernel/cpu.cc
SRC_CC += spec/arm/cpu_context.cc
# include less specific configuration
include $(BASE_DIR)/../base-hw/lib/mk/spec/smp/core-hw.inc

1
repos/base-hw/lib/mk/spec/cortex_a8/core-hw.inc
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@ -9,7 +9,6 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/cortex_a8
# add C++ sources
SRC_CC += spec/cortex_a8/cpu.cc
SRC_CC += spec/arm/kernel/cpu_context.cc
SRC_CC += spec/arm/kernel/cpu.cc
SRC_CC += spec/arm/kernel/thread_update_pd.cc
SRC_CC += kernel/kernel.cc

3
repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc
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@ -13,10 +13,9 @@ SRC_CC += spec/cortex_a9/kernel/cpu.cc
SRC_CC += spec/cortex_a9/fpu.cc
SRC_CC += spec/cortex_a9/board.cc
SRC_CC += spec/cortex_a9/timer.cc
SRC_CC += spec/arm/cpu_context.cc
SRC_CC += spec/arm/cpu.cc
SRC_CC += spec/arm/smp/kernel/thread_update_pd.cc
SRC_CC += spec/arm/smp/kernel/cpu.cc
SRC_CC += spec/arm/kernel/cpu_context.cc
SRC_CC += spec/arm_gic/pic.cc
SRC_CC += kernel/vm_thread_off.cc

2
repos/base-hw/lib/mk/spec/imx53_qsb/core-hw.mk
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@ -11,7 +11,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/imx53
SRC_CC += spec/imx53/pic.cc
SRC_CC += spec/imx53/timer.cc
SRC_CC += spec/arm/cpu_context_trustzone.cc
SRC_CC += spec/arm/cpu_trustzone.cc
ifneq ($(filter-out $(SPECS),trustzone),)
SRC_CC += kernel/vm_thread_off.cc

1
repos/base-hw/lib/mk/spec/muen/core-hw.mk
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@ -34,7 +34,6 @@ SRC_CC += spec/x86_64/bios_data_area.cc
SRC_CC += spec/x86_64/cpu.cc
SRC_CC += spec/x86_64/fpu.cc
SRC_CC += spec/x86_64/kernel/cpu.cc
SRC_CC += spec/x86_64/kernel/cpu_context.cc
SRC_CC += spec/x86_64/kernel/pd.cc
SRC_CC += spec/x86_64/kernel/thread.cc
SRC_CC += spec/x86_64/kernel/thread.cc

1
repos/base-hw/lib/mk/spec/odroid_xu/core-hw.mk
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@ -8,7 +8,6 @@
INC_DIR += $(REP_DIR)/src/core/spec/odroid_xu
# add C++ sources
SRC_CC += spec/arm/kernel/cpu_context.cc
SRC_CC += spec/arm_gic/pic.cc
SRC_CC += kernel/vm_thread_off.cc
SRC_CC += platform_services.cc

1
repos/base-hw/lib/mk/spec/riscv/core-hw.mk
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@ -5,7 +5,6 @@ CC_OPT += -fno-delete-null-pointer-checks
# add C++ sources
SRC_CC += platform_services.cc
SRC_CC += kernel/vm_thread_off.cc kernel/kernel.cc
SRC_CC += spec/riscv/kernel/cpu_context.cc
SRC_CC += spec/riscv/kernel/thread.cc
SRC_CC += spec/riscv/kernel/pd.cc
SRC_CC += spec/riscv/kernel/cpu.cc

2
repos/base-hw/lib/mk/spec/rpi/core-hw.mk
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@ -9,7 +9,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/rpi
# add C++ sources
SRC_CC += platform_services.cc
SRC_CC += spec/arm/cpu_context.cc
SRC_CC += spec/arm/cpu.cc
SRC_CC += spec/rpi/timer.cc
SRC_CC += spec/rpi/pic.cc

2
repos/base-hw/lib/mk/spec/usb_armory/core-hw.mk
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@ -18,7 +18,7 @@ SRC_CC += spec/arm_v7/vm_session_component.cc
SRC_CC += spec/arm_v7/trustzone/vm_session_component.cc
SRC_CC += spec/imx53/pic.cc
SRC_CC += spec/imx53/timer.cc
SRC_CC += spec/arm/cpu_context_trustzone.cc
SRC_CC += spec/arm/cpu_trustzone.cc
# add assembly sources
SRC_S += spec/arm_v7/trustzone/exception_vector.s

1
repos/base-hw/lib/mk/spec/x86_pc/core-hw.mk
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@ -28,7 +28,6 @@ SRC_CC += spec/x86_64/bios_data_area.cc
SRC_CC += spec/x86_64/cpu.cc
SRC_CC += spec/x86_64/fpu.cc
SRC_CC += spec/x86_64/kernel/cpu.cc
SRC_CC += spec/x86_64/kernel/cpu_context.cc
SRC_CC += spec/x86_64/kernel/pd.cc
SRC_CC += spec/x86_64/kernel/thread.cc
SRC_CC += spec/x86_64/kernel/thread.cc

16
repos/base-hw/src/core/kernel/cpu.cc
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@ -218,10 +218,6 @@ Cpu_domain_update::Cpu_domain_update() {
for (unsigned i = 0; i < NR_OF_CPUS; i++) { _pending[i] = false; } }
/*****************
** Cpu_context **
*****************/
/**
* FIXME THIS IS ONLY USED BY IDLE THREAD
* Enable kernel-entry assembly to get an exclusive stack for every CPU
@ -239,15 +235,3 @@ Cpu_domain_update::Cpu_domain_update() {
Genode::size_t kernel_stack_size = Cpu::KERNEL_STACK_SIZE;
Genode::uint8_t kernel_stack[NR_OF_CPUS][Cpu::KERNEL_STACK_SIZE]
__attribute__((aligned(Genode::get_page_size())));
Cpu_context::Cpu_context(Hw::Page_table * const table)
{
sp = (addr_t)kernel_stack;
ip = (addr_t)kernel;
/*
* platform specific initialization, has to be done after
* setting the registers by now
*/
_init(Cpu::KERNEL_STACK_SIZE, (addr_t)table);
}

27
repos/base-hw/src/core/kernel/cpu.h
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@ -25,11 +25,6 @@ namespace Hw { class Page_table; }
namespace Kernel
{
/**
* CPU context of a kernel stack
*/
class Cpu_context;
/**
* Context of a job (thread, VM, idle) that shall be executed by a CPU
*/
@ -61,28 +56,6 @@ namespace Kernel
Cpu_pool * cpu_pool();
}
class Kernel::Cpu_context : public Genode::Cpu::Context
{
private:
/**
* Hook for environment specific initializations
*
* \param stack_size size of kernel stack
* \param table base of transit translation table
*/
void _init(size_t const stack_size, addr_t const table);
public:
/**
* Constructor
*
* \param table mode-transition table
*/
Cpu_context(Hw::Page_table * const table);
};
class Kernel::Cpu_domain_update : public Double_list_item
{
friend class Cpu_domain_update_list;

0
repos/base-hw/src/core/spec/arm/cpu_context.cc → repos/base-hw/src/core/spec/arm/cpu.cc
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0
repos/base-hw/src/core/spec/arm/cpu_context_trustzone.cc → repos/base-hw/src/core/spec/arm/cpu_trustzone.cc
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24
repos/base-hw/src/core/spec/arm/kernel/cpu_context.cc
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@ -1,24 +0,0 @@
/*
* \brief Kernel cpu context specific implementation
* \author Stefan Kalkowski
* \date 2015-02-11
*/
/*
* Copyright (C) 2015-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
/* core includes */
#include <kernel/cpu.h>
#include <platform.h>
void Kernel::Cpu_context::_init(size_t const stack_size, addr_t const table)
{
r12 = stack_size;
cpu_exception = Genode::Cpu::Ttbr0::init(table);
protection_domain(0);
translation_table(table);
}

26
repos/base-hw/src/core/spec/arm_v7/virtualization/kernel/cpu_context.cc
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@ -1,26 +0,0 @@
/*
* \brief Kernel cpu context specific implementation
* \author Stefan Kalkowski
* \date 2015-02-11
*/
/*
* Copyright (C) 2015-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
/* core includes */
#include <kernel/cpu.h>
void Kernel::Cpu_context::_init(size_t const stack_size, addr_t const table)
{
r12 = stack_size;
cpu_exception = Genode::Cpu::Ttbr0::init(table);
protection_domain(0);
translation_table(table);
sctlr = 0x00003805; // FIXME
ttbrc = 0x80002500; // FIXME
mair0 = 0x04ff0444; // FIXME
}

28
repos/base-hw/src/core/spec/riscv/kernel/cpu_context.cc
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@ -1,28 +0,0 @@
/**
* \brief Kernel cpu context specific implementation
* \author Sebastian Sumpf
* \date 2015-06-02
*/
/*
* Copyright (C) 2015-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
/* Core includes */
#include <kernel/cpu.h>
void Kernel::Cpu_context::_init(size_t const stack_size, addr_t const table)
{
/*
* The stack pointer currently contains the base address of the
* kernel stack area that contains the kernel stacks of all CPUs. As this
* is a uni-processor platform, we merely have to select the first kernel
* stack, i.e. increasing sp by the size of one stack.
*/
sp = sp + stack_size;
translation_table(table);
protection_domain(0);
}

27
repos/base-hw/src/core/spec/x86_64/kernel/cpu_context.cc
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@ -1,27 +0,0 @@
/*
* \brief Kernel cpu context specific implementation
* \author Stefan Kalkowski
* \date 2015-02-11
*/
/*
* Copyright (C) 2015-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
/* core includes */
#include <kernel/cpu.h>
#include <base/log.h>
void Kernel::Cpu_context::_init(size_t const stack_size, addr_t const table)
{
/*
* The stack pointer already contains the stack base address
* of all CPU's kernel stacks, on this uni-processor platform
* it is sufficient to increase it by the stack's size
*/
sp = sp + stack_size;
cr3 = Genode::Cpu::Cr3::init(table);
}