Commit Graph

78 Commits

Author SHA1 Message Date
Ehmry - 11ff9a1dc5 Add base-hw Tup rules 2020-02-13 12:13:16 +01:00
Ehmry - da0c9da996 Minor code adjustments for LLVM 2020-02-11 13:47:26 +01:00
Ehmry - 3d68a520cb Tag release 19.11
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Merge tag '19.11'

Tag release 19.11
2019-11-28 13:21:13 +01:00
Stefan Kalkowski af29dcf557 hw: introduce virtualization support for ARMv8
Ref #3553
2019-11-21 14:29:36 +01:00
Ehmry - 6e9f9ce3a8 Core includes untangling
Express convoluted include walks directly in code, do not hide them
in build scripts.
2019-10-04 00:52:02 +02:00
Stefan Kalkowski 90d07741aa hw: support for ARM64 Raspberry Pi 3
Restriction: enables only cpu core 0 and the timer interrupt by now.

Fix #3405
2019-07-09 08:55:22 +02:00
Stefan Kalkowski 0ca199f89a hw: replace lock-safe log variants in kernel
As far as possible remove usage of warning/error/log in the kernel,
otherwise the kernel context might try to take a lock hold by a core
thread, which results in a syscall to block.

Fix #3277
2019-04-09 12:30:35 +02:00
Stefan Kalkowski 935abb55b7 hw: move `src/lib/hw` header to `src/include/hw`
* Remove bad style of using `src/lib` as include path

Fix #3244
2019-04-01 19:33:51 +02:00
Stefan Kalkowski baf815d099 hw: add support for i.MX7 Dual SABRE board
Fix #3251
2019-04-01 19:33:49 +02:00
Stefan Kalkowski 3725e91603 hw: implement power-saving kernel lock for ARM smp
Thanks to former work of Martin Stein this commit finally incorporates a
non-spinning kernel lock on multi-core ARM platforms.

Fix #1313
2019-04-01 19:33:47 +02:00
Stefan Kalkowski e9b3569f44 hw: remove overall cache maintainance from core
This functionality is only needed in bootstrap now that kernel and
userland share the same address-space.

Fix #2699
2019-04-01 19:33:46 +02:00
Stefan Kalkowski 822a6e7c5f hw_riscv: strictly separate machine and syscall ids
Fix #3230
2019-03-18 15:56:59 +01:00
Stefan Kalkowski 330692350e hw: introduce non-blocking signal checking
* Introduces pending_signal syscall to check for new signals for the
  calling thread without blocking
* Implements pending_signal in the base-library specific for hw to use the
  new syscall

Fix #3217
2019-03-18 15:56:24 +01:00
Stefan Kalkowski 80fa23da5e hw: increase timing accuracy of kernel (fix #3081)
* Introduce 64-bit tick counter
* Let the timer always count when possible, also if it already fired
* Simplify the kernel syscall API to have one current time call,
  which returns the elapsed microseconds since boot
2019-03-18 15:56:23 +01:00
Norman Feske b3727a9b46 Add missing override annotations
Issue #3159
2019-02-19 11:12:11 +01:00
Norman Feske aa66b5d62f base: remove dependency from deprecated APIs
This patch adjusts the implementation of the base library and core such
that the code no longer relies on deprecated APIs except for very few
cases, mainly to keep those deprecated APIs in tact for now.

The most prominent changes are:

- Removing the use of base/printf.h

- Removing of the log backend for printf. The 'Console' with the
  format-string parser is still there along with 'snprintf.h' because
  the latter is still used at a few places, most prominently the
  'Connection' classes.

- Removing the notion of a RAM session, which does not exist in
  Genode anymore. Still the types were preserved (by typedefs to
  PD session) to keep up compatibility. But this transition should
  come to an end now.

- Slight rennovation of core's tracing service, e.g., the use of an
  Attached_dataspace as the Argument_buffer.

- Reducing the reliance on global accessors like deprecated_env() or
  core_env(). Still there is a longish way to go to eliminate all such
  calls. A useful pattern (or at least a stop-gap solution) is to
  pass the 'Env' to the individual compilation units via init functions.

- Avoiding the use of the old 'Child_policy::resolve_session_request'
  interface that returned a 'Service' instead of a 'Route'.

Issue #1987
2019-02-19 11:08:17 +01:00
Norman Feske 237d2bff3a base: fix deadlock during signal-context dissolve
This patch moves the removal of the signal context from the
'_platform_finish_dissolve' to the '_platform_begin_dissolve'
method. This is needed because the removal involves taking
the signal-registry lock. The latter must adhere the same
locking order as the code path used for signal delivery.

Fixes #3109
2019-01-30 13:55:19 +01:00
Stefan Kalkowski 8e13b376b0 hw: improve cross-cpu synchronization
This commit addresses several multiprocessing issues in base-hw:

* it reworks cross-cpu maintainance work for TLB invalidation by
  introducing a generic Inter_processor_work and removes the so
  called Cpu_domain_update
* thereby it solves the cross-cpu thread destruction, when the
  corresponding thread is active on another cpu (fix #3043)
* it adds the missing TLB shootdown for x86 (fix #3042)
* on ARM it removes the TLB shootdown via IPIs, because this
  is not needed on the multiprocessing ARM platforms we support
* it enables the per-cpu initialization of the kernel's cpu
  objects, which means those object initialization is executed
  by the proper cpu
* it rollbacks prior decision to make multiprocessing an aspect,
  but puts back certain 'smp' mechanisms (like cross-cpu lock)
  into the generic code base for simplicity reasons
2019-01-07 12:25:44 +01:00
Stefan Kalkowski aeb7ab4774 hw: prevent potential dead-lock in signal destruction
Fix #3063
2019-01-07 12:25:42 +01:00
Stefan Kalkowski 8c460b3ea5 hw: enable l2-cache on Wandboard Quad (fix #1807) 2018-11-16 15:17:06 +01:00
Alexander Boettcher bf340eee91 hw: provide CPU count to core by bootstrap
The count is supposed to provide the actual available CPUs, which may not
be equal to NR_OF_CPUS.

Issue #2929
2018-08-28 16:48:44 +02:00
Alexander Boettcher 538d91ecf2 hw/x86: ACPI tables parsing support
Issue #2929
2018-08-28 16:48:44 +02:00
Alexander Boettcher e6046e0bc1 hw/x86: read out local APIC base dynamically
Issue #2929
2018-08-28 16:48:43 +02:00
Martin Stein fbe9d26c47 trace: initialize trace control in Thread::start
Previously, the trace control of a thread was initialized in its
constructor (which is generic for all components). This has the
disadvantage that the CPU-session-pointer member of the thread might not
be valid at this point. And it cannot be replaced by using the
"deprecated_env" CPU session neither as constructing the deprecated
environment in causes troubles in Core. But as the trace control
shouldn't be needed in Core anyway, the initialization can be moved to
the Thread::start implementation of non-core components. This code
already takes care of the CPU session pointer.

Fixes #2901
2018-08-02 14:36:35 +02:00
Stefan Kalkowski a9082eb162 hw/panda: fix -O0 / -fno-omit-frame-pointer builds 2018-05-30 12:26:19 +02:00
Reto Buerki 810f59b555 muen: Update sinfo to variant resources API 2018-04-19 12:38:25 +02:00
Johannes Schlatow bfe0031304 base-hw: enable SMP support for Zynq-7000 boards
Issue #2641
2018-02-09 13:34:19 +01:00
Norman Feske eba9c15746 Follow practices suggested by "Effective C++"
The patch adjust the code of the base, base-<kernel>, and os repository.
To adapt existing components to fix violations of the best practices
suggested by "Effective C++" as reported by the -Weffc++ compiler
argument. The changes follow the patterns outlined below:

* A class with virtual functions can no longer publicly inherit base
  classed without a vtable. The inherited object may either be moved
  to a member variable, or inherited privately. The latter would be
  used for classes that inherit 'List::Element' or 'Avl_node'. In order
  to enable the 'List' and 'Avl_tree' to access the meta data, the
  'List' must become a friend.

* Instead of adding a virtual destructor to abstract base classes,
  we inherit the new 'Interface' class, which contains a virtual
  destructor. This way, single-line abstract base classes can stay
  as compact as they are now. The 'Interface' utility resides in
  base/include/util/interface.h.

* With the new warnings enabled, all member variables must be explicitly
  initialized. Basic types may be initialized with '='. All other types
  are initialized with braces '{ ... }' or as class initializers. If
  basic types and non-basic types appear in a row, it is nice to only
  use the brace syntax (also for basic types) and align the braces.

* If a class contains pointers as members, it must now also provide a
  copy constructor and assignment operator. In the most cases, one
  would make them private, effectively disallowing the objects to be
  copied. Unfortunately, this warning cannot be fixed be inheriting
  our existing 'Noncopyable' class (the compiler fails to detect that
  the inheriting class cannot be copied and still gives the error).
  For now, we have to manually add declarations for both the copy
  constructor and assignment operator as private class members. Those
  declarations should be prepended with a comment like this:

        /*
         * Noncopyable
         */
        Thread(Thread const &);
        Thread &operator = (Thread const &);

  In the future, we should revisit these places and try to replace
  the pointers with references. In the presence of at least one
  reference member, the compiler would no longer implicitly generate
  a copy constructor. So we could remove the manual declaration.

Issue #465
2018-01-17 12:14:35 +01:00
Stefan Kalkowski 323de9b229 hw: map kernel text segment read-only
Fix #2592
2017-12-21 15:01:33 +01:00
Alexander Boettcher 858f5732ba hw: add mbi2 framebuffer support
Issue #2555
2017-11-30 11:23:09 +01:00
Martin Stein 8e80c05be7 signal: organize signal contexts as ring list
Ref #2532
2017-11-30 11:23:02 +01:00
Stefan Kalkowski d164cbac8c hw: do not change x86 paging attributes on fly
Instead of changing the attributes (e.g., Xd bit) of the top-level page-tables,
set them to allow everything. Only leafs of the paging hierarchy are set
according to the paging attributes given by core. Otherwise, top-level page-
table attributes are changed during lifetime, which requires a TLB flush
operation (not intended in the semantic of the kernel/core).
This led to problems when using the non-executable features introduced by
issue #1723 in the recent past.
2017-11-09 12:18:44 +01:00
Stefan Kalkowski d6a05245f2 hw: remove User_context
Fix #2540
2017-11-06 13:57:20 +01:00
Alexander Boettcher 4dd5e6b266 hw: enable nx bit handling for arm 2017-11-01 08:39:49 +01:00
Stefan Kalkowski 4e97a6511b hw: switch page-tables only when necessary
* Instead of always re-load page-tables when a thread context is switched
  only do this when another user PD's thread is the next target,
  core-threads are always executed within the last PD's page-table set
* remove the concept of the mode transition
* instead map the exception vector once in bootstrap code into kernel's
  memory segment
* when a new page directory is constructed for a user PD, copy over the
  top-level kernel segment entries on RISCV and X86, on ARM we use a designated
  page directory register for the kernel segment
* transfer the current CPU id from bootstrap to core/kernel in a register
  to ease first stack address calculation
* align cpu context member of threads and vms, because of x86 constraints
  regarding the stack-pointer loading
* introduce Align_at template for members with alignment constraints
* let the x86 hardware do part of the context saving in ISS, by passing
  the thread context into the TSS before leaving to user-land
* use one exception vector for all ARM platforms including Arm_v6

Fix #2091
2017-10-19 13:31:18 +02:00
Stefan Kalkowski ca60e24ad9 hw: run core threads in privileged mode
* introduce new syscall (core-only) to create privileged threads
* take the privilege level of the thread into account
  when doing a context switch
* map kernel segment as accessable for privileged code only

Ref #2091
2017-10-19 13:31:17 +02:00
Stefan Kalkowski 42db1e112b hw: introduce kernel/user address space split
* introduces central memory map for core/kernel
* on 32-bit platforms the kernel/core starts at 0x80000000
* on 64-bit platforms the kernel/core starts at 0xffffffc000000000
* mark kernel/core mappings as global ones (tagged TLB)
* move the exception vector to begin of core's binary,
  thereby bootstrap knows from where to map it appropriately
* do not map boot modules into core anymore
* constrain core's virtual heap memory area
* differentiate in between user's and core's main thread's UTCB,
  which now resides inside the kernel segment

Ref #2091
2017-10-19 13:31:17 +02:00
Martin Stein b811ef4331 signal: fix starvation by fast signal contexts
In the past, a signal context, that was chosen for handling by
'Signal_receiver::pending_signal and always triggered again before
the next call of 'pending_signal', caused all other contexts behind
in the list to starve. This was the case because 'pending_signal'
always took the first pending context in its context list.

We avoid this problem now by handling pending signals in a round-robin
fashion instead.

Ref #2532
2017-10-19 13:29:42 +02:00
Sebastian Sumpf f361cb28a5 base-hw: timer support for RISC-V
issue #2423
2017-08-30 10:00:00 +02:00
Stefan Kalkowski b8cd58e6a5 hw: enable mappings beyond 4G on x86_64
Fix #2498
2017-08-28 16:49:46 +02:00
Alexander Boettcher 6792456e4e hw: provide ACPI infos via platform_info ROM
in uefi/mbi2 boot case

Issue #2242
2017-08-28 16:49:44 +02:00
Stefan Kalkowski a004462096 hw: fix capability accounting of kernel/core
The recently implemented capability resource trading scheme unfortunately
broke the automated capability memory upgrade mechanism needed by base-hw
kernel/core. This commit splits the capability memory upgrade mechanism
from the PD session ram_quota upgrade, and moves that functionality
into a separate Pd_session::Native_pd interface.

Ref #2398
2017-06-19 12:35:55 +02:00
Sebastian Sumpf c3cf7f3c3a riscv: ISA-1.9.1 and GCC-6.3.0 adaptions
Adds 1.9.1 support to base-hw

Note:
* the kernel timer is not working
* dynamic linking is currently not supported
2017-05-31 13:16:24 +02:00
Sebastian Sumpf 6c95eb9aff base-hw: RISC-V BBL
The Berkley Boot Loader handles kernel loading and machine mode
2017-05-31 13:16:24 +02:00
Norman Feske 65225a94b1 core: simplify initialization
This patch removes the 'Core_parent' and 'Core_pd_session', and reduces
the 'Core_env'.
2017-05-31 13:16:12 +02:00
Norman Feske a1df4fee44 base: restructure signal-submit initialization
This patch allows core's 'Signal_transmitter' implementation to sidestep
the 'Env::Pd' interface and thereby adhere to a stricter layering within
core. The 'Signal_transmitter' now uses - on kernels that depend on it -
a dedicated (and fairly freestanding) RPC proxy mechanism for signal
deliver, instead of channeling signals through the 'Pd_session::submit'
RPC function.
2017-05-31 13:16:12 +02:00
Norman Feske 1f4f119b1e Capability quota accounting and trading
This patch mirrors the accounting and trading scheme that Genode employs
for physical memory to the accounting of capability allocations.

Capability quotas must now be explicitly assigned to subsystems by
specifying a 'caps=<amount>' attribute to init's start nodes.
Analogously to RAM quotas, cap quotas can be traded between clients and
servers as part of the session protocol. The capability budget of each
component is maintained by the component's corresponding PD session at
core.

At the current stage, the accounting is applied to RPC capabilities,
signal-context capabilities, and dataspace capabilities. Capabilities
that are dynamically allocated via core's CPU and TRACE service are not
yet covered. Also, the capabilities allocated by resource multiplexers
outside of core (like nitpicker) must be accounted by the respective
servers, which is not covered yet.

If a component runs out of capabilities, core's PD service prints a
warning to the log. To observe the consumption of capabilities per
component in detail, the PD service is equipped with a diagnostic
mode, which can be enabled via the 'diag' attribute in the target
node of init's routing rules. E.g., the following route enables the
diagnostic mode for the PD session of the "timer" component:

  <default-route>
    <service name="PD" unscoped_label="timer">
      <parent diag="yes"/>
    </service>
    ...
  </default-route>

For subsystems based on a sub-init instance, init can be configured
to report the capability-quota information of its subsystems by
adding the attribute 'child_caps="yes"' to init's '<report>'
config node. Init's own capability quota can be reported by adding
the attribute 'init_caps="yes"'.

Fixes #2398
2017-05-31 13:16:06 +02:00
Stefan Kalkowski 6106e64aac base: remove include/spec/* other than ISA
This commit moves the headers residing in `repos/base/include/spec/*/drivers`
to `repos/base/include/drivers/defs` or repos/base/include/drivers/uart`
respectively. The first one contains definitions about board-specific MMIO
iand RAM addresses, or IRQ lines. While the latter contains device driver
code for UART devices. Those definitions are used by driver implementations
in `repos/base-hw`, `repos/os`, and `repos/dde-linux`, which now need to
include them more explicitely.

This work is a step in the direction of reducing 'SPEC' identifiers overall.

Ref #2403
2017-05-31 13:16:01 +02:00
Stefan Kalkowski b9549e58d0 hw: cleanup core code (Ref #2394) 2017-05-31 13:15:53 +02:00
Stefan Kalkowski 67ba7b89a7 hw: separate bootstrap and core strictly
* Introduce Hw namespace and library files under src/lib/hw
* Introduce Bootstrap namespace
* Move all initialization logic into Bootstrap namespace

Ref #2388
2017-05-31 13:15:52 +02:00