base-hw: timer support for RISC-V

issue #2423

repos/base-hw/ports/bbl.hash

@@ -1 +1 @@
-98f2f30366201ee9826a78ff165cef69b6fd8e57
+10f40152b12a9fd068f88a587e84e342b707698e

repos/base-hw/ports/bbl.port

@@ -3,6 +3,6 @@ VERSION   := git
 DOWNLOADS := bbl.git
 
 URL(bbl) = https://github.com/ssumpf/bbl-lite.git
-REV(bbl) = 89f92ff01f675f907755b055c58c2142739d5bd8
+REV(bbl) = 0f86d104c470cfad70a9bc049865edb2ab0c4710
 DIR(bbl) = src/lib/bbl
 

repos/base-hw/src/core/spec/riscv/timer.cc

@@ -26,6 +26,7 @@ Timer_driver::Timer_driver(unsigned)
 	asm volatile ("csrs sie, %0" : : "r"(STIE));
 }
 
+addr_t Timer_driver::stime() { return Hw::get_sys_timer(); }
 
 void Timer::_start_one_shot(time_t const ticks)
 {
@@ -54,4 +55,4 @@ time_t Timer::_value()
 
 
 unsigned Timer::interrupt_id() const {
-	return 1; }
+	return 5; }

repos/base-hw/src/core/spec/riscv/timer_driver.h

@@ -26,17 +26,13 @@ namespace Kernel { class Timer_driver; }
 struct Kernel::Timer_driver
 {
 	enum {
-		SPIKE_TIMER_HZ = 500000,
+		SPIKE_TIMER_HZ = 1000000,
 		TICS_PER_MS    = SPIKE_TIMER_HZ / 1000,
 	};
 
 	addr_t timeout = 0;
 
-	/* TODO: implement */
-	addr_t stime()
-	{
-		return 0;
-	}
+	addr_t stime();
 
 	Timer_driver(unsigned);
 };

repos/base-hw/src/lib/hw/spec/riscv/machine_call.h

@@ -28,16 +28,18 @@ namespace Hw {
 	 *
 	 * Keep in sync with mode_transition.s.
 	 */
-	constexpr Call_arg call_id_set_sys_timer() { return 0x101; }
-	constexpr Call_arg call_id_get_sys_timer()  { return 0x102; }
+	constexpr Call_arg call_id_set_sys_timer() { return 200; }
+	constexpr Call_arg call_id_get_sys_timer() { return 201; }
 
-	inline void ecall(addr_t call, addr_t arg)
+	inline addr_t ecall(addr_t call, addr_t arg)
 	{
 		asm volatile ("mv a0, %0\n"
 		              "mv a1, %1\n"
-		               "ecall   \n"
-		              : : "r"(call), "r"(arg)
+		              "ecall    \n"
+		              "mv %0, a0\n"
+		              :  "+r"(call) : "r"(arg)
 		              : "a0", "a1");
+		return call;
 	}
 
 	inline void put_char(addr_t c) {