genode/repos/base-hw/lib/mk/platform_vea9x4/core.mk

#
# \brief  Build config for Genodes core process
# \author Stefan Kalkowski
# \author Martin Stein
# \date   2012-10-04
#

# add include paths
INC_DIR += $(REP_DIR)/src/core/include/spec/vea9x4
INC_DIR += $(REP_DIR)/src/core/include/spec/pl011

# add C++ sources
SRC_CC += platform_services.cc
SRC_CC += spec/vea9x4/platform_support.cc
SRC_CC += spec/vea9x4/board.cc

# include less specific configuration
include $(REP_DIR)/lib/mk/cortex_a9/core.inc
hw: core as library The build config for core is now provided through libraries to enable implicit config composition through specifiers and thereby avoid consideration of inappropriate targets. fix #1199 2014-07-03 13:39:42 +02:00			`#`
			`# \brief Build config for Genodes core process`
			`# \author Stefan Kalkowski`
			`# \author Martin Stein`
			`# \date 2012-10-04`
			`#`

			`# add include paths`
hw: re-organize file structure fix #1197 2014-07-09 12:03:17 +02:00			`INC_DIR += $(REP_DIR)/src/core/include/spec/vea9x4`
			`INC_DIR += $(REP_DIR)/src/core/include/spec/pl011`
hw: core as library The build config for core is now provided through libraries to enable implicit config composition through specifiers and thereby avoid consideration of inappropriate targets. fix #1199 2014-07-03 13:39:42 +02:00
hw: rename processor CPU fix #1217 2014-07-15 14:51:27 +02:00			`# add C++ sources`
hw vea9x4: remove trustzone support When building Genode for VEA9X4 as micro-hypervisor protected by the ARM TrustZone hardware we ran into limitations regarding our basic daily testing routines. The most significant is that, when speaking about RAM partitioning, the only available options are to configure the whole SRAM to be secure and the whole DDR-RAM to be non-secure or vice versa. The SRAM however provides only 32 MB which isn't enough for both a representative non-secure guest OS or a secure Genode that is still capable of passing our basic tests. This initiated our decision to remove the VEA9X4 TrustZone-support. Fixes #1351 2015-01-08 13:28:42 +01:00			`SRC_CC += platform_services.cc`
			`SRC_CC += spec/vea9x4/platform_support.cc`
hw_vea9x4: quickfix slow RAM access Setting the ACTLR.SMP bit also without SMP support fastens RAM access significantly. A proper solution would implement SMP support which must enable the bit anyway. Fixes #1353 2015-02-16 11:35:06 +01:00			`SRC_CC += spec/vea9x4/board.cc`
hw: rename processor CPU fix #1217 2014-07-15 14:51:27 +02:00
hw: re-organize file structure fix #1197 2014-07-09 12:03:17 +02:00			`# include less specific configuration`
hw: LPAE for Cortex a15 (fix #1387) 2015-02-06 11:26:39 +01:00			`include $(REP_DIR)/lib/mk/cortex_a9/core.inc`