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hw_vea9x4: quickfix slow RAM access 

Setting the ACTLR.SMP bit also without SMP support fastens RAM access
significantly. A proper solution would implement SMP support which must enable
the bit anyway.

Fixes #1353
This commit is contained in:
Martin Stein 2015-02-16 11:35:06 +01:00 committed by Christian Helmuth
parent 467eee07a6
commit 3a40c27c26
4 changed files with 49 additions and 1 deletions
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1
repos/base-hw/lib/mk/platform_vea9x4/core.mk
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@ -13,6 +13,7 @@ INC_DIR += $(REP_DIR)/src/core/include/spec/pl011
# add C++ sources
SRC_CC += platform_services.cc
SRC_CC += spec/vea9x4/platform_support.cc
SRC_CC += spec/vea9x4/board.cc
SRC_CC += spec/cortex_a9/pic.cc
SRC_CC += spec/arm_gic/pic.cc

18
repos/base-hw/src/core/include/spec/cortex_a9/cpu.h
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@ -213,6 +213,24 @@ class Genode::Cpu : public Arm_v7
public:
/**
* Auxiliary Control Register
*/
struct Actlr : Register<32>
{
struct Smp : Bitfield<6, 1> { };
static access_t read()
{
access_t v;
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (v) :: );
return v;
}
static void write(access_t const v) {
asm volatile ("mcr p15, 0, %0, c1, c0, 1" :: "r" (v) : ); }
};
enum
{
/* interrupt controller */

2
repos/base-hw/src/core/include/spec/vea9x4/board.h
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@ -25,7 +25,7 @@ namespace Genode
static void outer_cache_invalidate() { }
static void outer_cache_flush() { }
static void prepare_kernel() { }
static void prepare_kernel();
static void secondary_cpus_ip(void * const ip) { }
/**

29
repos/base-hw/src/core/spec/vea9x4/board.cc Normal file
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@ -0,0 +1,29 @@
/*
* \brief Board driver for core
* \author Martin Stein
* \date 2015-02-16
*/
/*
* Copyright (C) 2012-2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
/* core includes */
#include <cpu.h>
using namespace Genode;
void Board::prepare_kernel()
{
/**
* FIXME We enable this bit although base-hw doesn't support
* SMP because it fastens RAM access significantly.
*/
Cpu::Actlr::access_t actlr = Cpu::Actlr::read();
Cpu::Actlr::Smp::set(actlr, 1);
Cpu::Actlr::write(actlr);
}