Martin Stein 60a7fe5586 hw & arm: write whole SPSR in mode transition ... Previously we did write the SPSR via an MSR instruction without additional flags. Unfortunately, this tells the CPU to write the register only partially. This often isn't a problem as the users PSR reset value normally is conform to our expectations but in some cases (e.g. PSR endianess bit on WandBoard core #4) the reset value is bad. Thus, we have to add the CXSF flags (access Control + eXtension + Status + Flags) so the CPU overwrites the entire register. Fixes #2254		2017-05-31 13:16:08 +02:00
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cpu.cc	hw: cleanup core code (Ref #2394)	2017-05-31 13:15:53 +02:00
cpu.h	hw: cleanup core code (Ref #2394)	2017-05-31 13:15:53 +02:00
macros.s	hw: remove core internal header directories	2017-05-31 13:15:52 +02:00
mode_transition.s	hw & arm: write whole SPSR in mode transition	2017-05-31 13:16:08 +02:00
perf_counter.cc	Adjust file headers to refer to the AGPLv3	2017-02-28 12:59:29 +01:00
translation_table.h	hw: cleanup core code (Ref #2394)	2017-05-31 13:15:53 +02:00