Commit Graph

526 Commits

Author SHA1 Message Date
Stefan Kalkowski
8cc48d5688 hw: be more accurate in synchronizing ASID/Pages
Fix #3651
2020-02-20 12:11:23 +01:00
Stefan Kalkowski
725d16e18e hw: optimize ipc capability allocation
In preparation of ipc receive, by now a bunch of capabilities got
allocated to be ready iin case of capability receiption. After that
unuse slots were freed again. This overhead of senseless (de-)allocations
is replaced in this commit by just restock capability slots that got
used by the last receive.

Fix #3640
2020-02-20 12:11:22 +01:00
Martin Stein
e42a205a51 base-hw: Ada-compliant scheduler method signatures
Ref #3308
2020-02-20 12:11:22 +01:00
Martin Stein
0d5f185267 base-hw: no pointers in scheduler interface
Ref #3308
2020-02-20 12:11:22 +01:00
Martin Stein
c146a215fb base-hw: cpu scheduler without inheritance
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
eef7b5e168 base-hw: double list without inheritance
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
793e12f8f3 base-hw: no error return codes in signaling
Error return codes are used with non-const functions in the signaling modules.
This would have been impractical for the in-place translation of the module to
Ada in the context of the Spunky project. Besides, it is easy to get rid of
them and it makes the execution flow more clear.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
751e6430fa base-hw: obsolete Kernel::Thread::_signal_receiver
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
9eb20c2be7 base-hw: no pointer arguments in signaling
Besides reducing the use of pointers in base-hw, this prepares for the in-place
translation of the signaling module to Ada in the context of the Spunky
project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
5e460394d2 base-hw: do not inherit Kernel::Object
This prevents the use of Kernel::Object as base class for the specific kernel
objects and instead makes it a member of the kernel objects. Besides
simplifying inheritance hierarchies in base-hw, this prepares for the in-place
translation of the signaling module (and others) to Ada in the context of the
Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
88043e144a base-hw: no virtual functions in signaling
Besides simplifying the execution flow in the signaling module, this prepares
for the in-place translation of the signaling module to Ada in the context of
the Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
3cc7774fe4 base-hw: Ada/SPARK-friendly Ipc_node interface
This prevents the use of C++ features in the public method interface of the
synchronous-IPC module that would be impractical for the in-place
translation of the module into Ada in the context of the Spunky project.

* Get rid of thread accessor.
* Get rid of non-const functions with return values.
* Get rid of pointer return-values.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
a04243aaf4 base-hw: remove unused Ipc_node accessor methods
Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
5a95183c3e base-hw: avoid that Ipc_node inherits
Besides simplifying inheritance hierarchies in base-hw, this prepares for the
in-place translation of the synchronous-IPC module to Ada in the context of the
Spunky project.

Ref #3308
2020-02-20 12:11:21 +01:00
Martin Stein
6a5aa18a7b base-hw: no PD code / virt methods in Ipc_node
This is a simplication of the asyncronous-IPC module of the base-hw kernel.
Besides structuring the code in a cleaner way, it prepares for the in-place
translation of the module into Ada in the context of the Spunky project.

* Get rid of virtual methods in Ipc_node.
* Move all stuff related to protection domains, capabilities, and UTCBs to
  the Thread class. this code might later be moved to a dedicated module, but
  for now it's just fine to have it done by the thread module.

Ref #3308
2020-02-20 12:11:21 +01:00
Stefan Kalkowski
79fba6c2ac core: add kernel-specific UTCB quota bookkeeping
Fix #859
2020-02-20 12:11:21 +01:00
Alexander Boettcher
7b964fa700 base: add affinity space info to platform info
Issue #3599
2020-02-04 15:51:10 +01:00
Norman Feske
de764d8490 base-hw/muen: add explicit array-bounds check 2020-02-04 15:51:08 +01:00
Norman Feske
5635c1318c base-hw: explicit bounds check in store_apic_id
Avoid relying on the caller regarding the CPU index argument to ease the
reasoning about the code.
2020-02-04 15:51:08 +01:00
Alexander Boettcher
e54ff599ca base-hw: trace execution time of core threads
Fixes #3572
2019-12-19 17:01:43 +01:00
Sebastian Sumpf
04969b6be0 base-hw: add trace execution time support
This enables the 'top' program on base-hw for debugging issue #3247 on
rpi.

Fixes #3572
2019-12-19 17:01:42 +01:00
2c510bb7f9 Remove unused lamba capture to fix clang warning
Issue #3564
2019-12-19 16:59:03 +01:00
Stefan Kalkowski
4800bcf5a0 hw: correct the i.MX6 Sabrelite timer settings
Fix #3561
2019-11-25 15:43:59 +01:00
Christian Prochaska
57d080d4f8 hw: use correct type on IRQ kernel object destruction
Fixes #3560
2019-11-25 14:15:39 +01:00
Stefan Kalkowski
af29dcf557 hw: introduce virtualization support for ARMv8
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
f82714f341 vm_session: return vcpu id when creating vcpu
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
02d68fdb97 hw: move arm virtualization to generic place
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
065b9fdb46 base-hw: extend syscalls to five arguments
Ref #3553
2019-11-21 14:29:36 +01:00
Stefan Kalkowski
f6435d91fc hw: turn Kernel_object into Genode::Constructible
Fix #3531
2019-11-19 14:42:23 +01:00
Stefan Kalkowski
87a6368ba1 hw: implement multi-processor support for rpi3
Fix #3522
2019-11-19 14:42:22 +01:00
Stefan Kalkowski
1cbd77c806 hw: implement multi-processor support for i.MX8
Fix #3520
2019-11-19 14:42:22 +01:00
Stefan Kalkowski
e3f82b09d7 hw: instantiate pic object per cpu
Ref #3520
2019-11-19 14:42:22 +01:00
Sebastian Sumpf
e855638266 hw: add system call for irq mode setting
Core is not allowd to access the kernel's Pic implementation directly.

fixes #3474
2019-08-21 13:25:25 +02:00
Stefan Kalkowski
7ced122ddc hw: support for i.MX8M Quad EVK
Fix #3426
2019-08-13 12:02:27 +02:00
Stefan Kalkowski
ee38504d81 hw: implement update_data_region for ARMv8
Ref #3426
2019-08-13 12:02:26 +02:00
Sebastian Sumpf
dd505edd19 hw: GICv3 implementation
* modern GICv3 implementation
* distributor
* redistributor
* MMIO cpu interface

Ref #3426
2019-08-13 12:02:26 +02:00
Stefan Kalkowski
fa1aa33f83 hw: sanitize arm trustzone/virtualization services
Those services are not SoC specific and have to reside at a generic place.

Fix #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski
907de9d37f hw: move timer into board.h
Unify the generic timer implementation for ARMv7 and ARMv8.

Ref #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski
5c7436bf10 hw: remove SMP variable from board.h
Whether an SoC has the multiprocessing extensions can be read out
from the identification registers, and does not need to be specified
in each board header.

Ref #3445
2019-08-13 12:02:26 +02:00
Stefan Kalkowski
875858b2cc hw: integrate interrupt controllers into board.h
Additionally, unify more implementation details in between different
usage patterns of ARM's generic interrupt controller (v2)

Ref #3445
2019-08-13 12:02:26 +02:00
Martin Stein
b87e21a392 base-hw: EFI sys-table pointer in platform info
Ref #3430
2019-08-13 12:02:03 +02:00
Stefan Kalkowski
90d07741aa hw: support for ARM64 Raspberry Pi 3
Restriction: enables only cpu core 0 and the timer interrupt by now.

Fix #3405
2019-07-09 08:55:22 +02:00
Stefan Kalkowski
87015df66c hw: change update_pd to invalidate_tlb
In the past, the core-only privileged syscall `update_pd` was used only
to invalidate the TLB after removal of page-table entries.
By now, the whole TLB at least for one protection domain got invalidated,
but in preparation for optimization and upcomingARM v8 support,
it is necessary to deliver the virtual memory region that needs to get
invalidated. Moreover, the name of the call shall represent explicitely
that it is used to invalidate the TLB.

Ref #3405
2019-07-09 08:55:22 +02:00
Sebastian Sumpf
da17f2cbd3 hw: eager FPU switching for x86_64
Since gcc 8.3.0 generates SSE instructions into kernel code, the
kernel itself may raise FPU exceptions and/or corrupt user level FPU
contexts thereby. Both things are not feasible, and therefore, lazy FPU
switching becomes a no go for base-hw because we cannot avoid FPU
instructions because of the entanglement of base-hw, base, and the tool
chain (libgcc_eh.a).

issue #3365
2019-05-27 14:53:32 +02:00
Sebastian Sumpf
f18285205c hw: enable FPU during CPU startup on x86
Also disable TS (task switch) flag in cr0 during kernel initialization,
so FPU faults are not raised. This became necessary since GCC lately
aggressively generates FPU instructions at arbitrary places and also at
early kernel-bootstrapping stages.

fixes #3365
2019-05-27 14:52:52 +02:00
Christian Prochaska
4fc3eca4aa base-hw: fix compile errors with GCC 8.3.0
Fixes #3326
2019-05-27 14:46:54 +02:00
Stefan Kalkowski
5c77ebb1fb hw: factor out x86 specific bootinfo
Ref #3326
2019-05-27 14:46:54 +02:00
Stefan Kalkowski
054df95ea4 hw: unify board definitions of bootstrap/core
Ref #3326
2019-05-27 14:46:54 +02:00
Stefan Kalkowski
a1e70b9ba4 kernel: differentiate board-specific components
Components like kernel, core, and bootstrap that are built for a
specific board need to reside inside the same architectural dependent
build directory. For instance there are sel4, foc, and hw kernel builds
for imx6q_sabrelite and imx7d_sabre, which have to reside inside the same
arm_v7 build directory.
This commit names those components explicitely, and adapts the run-tool to it.

Fix #3316
2019-05-27 14:46:52 +02:00
Stefan Kalkowski
13fb51eecf hw: remove implicit SoC-specific include path
Fix #3336
2019-05-16 13:11:02 +02:00