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hw_x86_64: Set EFLAGS IF, IOPL bits in Cpu::init_thread 

Enable interrupts for all threads, set I/O privilege level (IOPL) to 3
for core threads to allow UART access.
This commit is contained in:
Reto Buerki 2015-03-12 17:20:14 +01:00 committed by Christian Helmuth
parent 7ce8464b3a
commit 69a58c4bd5
2 changed files with 17 additions and 3 deletions
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17
repos/base-hw/src/core/include/spec/x86/cpu.h
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@ -275,6 +275,13 @@ class Genode::Cpu
Kernel::Call_arg user_arg_6() const { return r10; } Kernel::Call_arg user_arg_6() const { return r10; }
Kernel::Call_arg user_arg_7() const { return r11; } Kernel::Call_arg user_arg_7() const { return r11; }
/* Constants to handle thread-specific IF, IOPL values */
enum {
CORE_PD_ID = 1,
EFLAGS_IF_SET = 1 << 9,
EFLAGS_IOPL_3 = 3 << 12,
};
/** /**
* Initialize thread context * Initialize thread context
* *
@ -287,6 +294,16 @@ class Genode::Cpu
translation_table(table); translation_table(table);
Gdt::load(Cpu::exception_entry); Gdt::load(Cpu::exception_entry);
/*
* Enable interrupts for all threads, set I/O privilege level
* (IOPL) to 3 for core threads to allow UART access.
*/
eflags = EFLAGS_IF_SET;
if (pd_id == CORE_PD_ID)
{
eflags |= EFLAGS_IOPL_3;
}
} }
}; };

3
repos/base-hw/src/core/spec/x86_64/mode_transition.s
View File

@ -203,9 +203,6 @@
mov $_mt_buffer+BUFFER_SIZE, %rsp mov $_mt_buffer+BUFFER_SIZE, %rsp
pushq $0x23 pushq $0x23
pushq SP_OFFSET(%rax) pushq SP_OFFSET(%rax)
/* Set I/O privilege level to 3 and enable interrupts */
orq $0x3200, FLAGS_OFFSET(%rax)
pushq FLAGS_OFFSET(%rax) pushq FLAGS_OFFSET(%rax)
pushq $0x1b pushq $0x1b