2014-04-28 21:31:57 +02:00
|
|
|
/*
|
2015-02-06 11:26:39 +01:00
|
|
|
* \brief Translation table definitions for core
|
|
|
|
* \author Martin Stein
|
|
|
|
* \author Stefan Kalkowski
|
|
|
|
* \date 2012-02-22
|
2014-04-28 21:31:57 +02:00
|
|
|
*/
|
2016-01-20 20:52:51 +01:00
|
|
|
|
2014-04-28 21:31:57 +02:00
|
|
|
/*
|
2017-02-20 13:23:52 +01:00
|
|
|
* Copyright (C) 2012-2017 Genode Labs GmbH
|
2014-04-28 21:31:57 +02:00
|
|
|
*
|
|
|
|
* This file is part of the Genode OS framework, which is distributed
|
2017-02-20 13:23:52 +01:00
|
|
|
* under the terms of the GNU Affero General Public License version 3.
|
2014-04-28 21:31:57 +02:00
|
|
|
*/
|
2016-01-20 20:52:51 +01:00
|
|
|
|
2017-04-12 10:06:29 +02:00
|
|
|
#ifndef _CORE__SPEC__CORTEX_A8__TRANSLATION_TABLE_H_
|
|
|
|
#define _CORE__SPEC__CORTEX_A8__TRANSLATION_TABLE_H_
|
2014-04-28 21:31:57 +02:00
|
|
|
|
2017-02-21 13:46:59 +01:00
|
|
|
#include <hw/spec/arm/page_table.h>
|
|
|
|
#include <kernel/interface.h>
|
2014-04-28 21:31:57 +02:00
|
|
|
|
2017-02-21 13:46:59 +01:00
|
|
|
#include <cpu.h>
|
|
|
|
|
|
|
|
constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() {
|
|
|
|
return 2; }
|
|
|
|
|
|
|
|
constexpr bool Hw::Page_table::Descriptor_base::_smp() { return false; }
|
|
|
|
|
|
|
|
void Hw::Page_table::_translation_added(unsigned long addr, unsigned long size)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The Cortex-A8 CPU can't use the L1 cache on page-table
|
|
|
|
* walks. Therefore, as the page-tables lie in write-back cacheable
|
|
|
|
* memory we've to clean the corresponding cache-lines even when a
|
|
|
|
* page table entry is added. We only do this as core as the kernel
|
|
|
|
* adds translations solely before MMU and caches are enabled.
|
|
|
|
*/
|
2020-03-03 15:56:50 +01:00
|
|
|
Genode::Cpu::clean_data_cache_by_virt_region(addr, size);
|
2017-02-21 13:46:59 +01:00
|
|
|
}
|
2014-04-28 21:31:57 +02:00
|
|
|
|
2017-04-12 10:06:29 +02:00
|
|
|
#endif /* _CORE__SPEC__CORTEX_A8__TRANSLATION_TABLE_H_ */
|