f1d599ae8a
To enable a repo to name its specific board driver 'Board'. Fix #569
89 lines
2.1 KiB
C++
89 lines
2.1 KiB
C++
/*
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* \brief Platform implementations specific for base-hw and VEA9X4
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* \author Martin Stein
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* \date 2012-04-27
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*/
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/*
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* Copyright (C) 2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode includes */
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#include <drivers/board_base.h>
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/* Core includes */
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#include <platform.h>
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#include <vea9x4_trustzone/pic.h>
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#include <cortex_a9/cpu.h>
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using namespace Genode;
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Native_region * Platform::_ram_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Board_base::RAM_3_BASE, Board_base::RAM_3_SIZE }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ 0, 34 },
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{ 37, 3 },
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{ 46, 1 },
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{ 49, Vea9x4_trustzone::Pic::MAX_INTERRUPT_ID - 49 }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* Core timer */
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{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
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/* Core UART */
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{ Board_base::PL011_0_IRQ, 1 }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE },
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{ Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE },
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{ 0x60000000, 0x40000000 },
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{ Board_base::TZASC_MMIO_BASE, Board_base::TZASC_MMIO_SIZE },
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{ Board_base::TZPC_MMIO_BASE, Board_base::TZPC_MMIO_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* Core timer and PIC */
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{ Board_base::CORTEX_A9_PRIVATE_MEM_BASE,
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Board_base::CORTEX_A9_PRIVATE_MEM_SIZE },
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/* Core UART */
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{ Board_base::PL011_0_MMIO_BASE, Board_base::PL011_0_MMIO_SIZE }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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