786fe805da
On ARM it's relevant to not only distinguish between ordinary cached memory and write-combined one, but also having non-cached memory too. To insert the appropriated page table entries e.g.: in the base-hw kernel, we need to preserve the information about the kind of memory from allocation until the pager resolves a page fault. Therefore, this commit introduces a new Cache_attribute type, and replaces the write_combined boolean with the new type where necessary.
43 lines
1.0 KiB
C++
43 lines
1.0 KiB
C++
/*
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* \brief Core implementation of the ROM session interface
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* \author Norman Feske
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* \date 2006-07-06
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*/
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/*
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* Copyright (C) 2006-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#include <base/printf.h>
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#include <util/arg_string.h>
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#include <rom_session_component.h>
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#include <root/root.h>
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using namespace Genode;
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Rom_session_component::Rom_session_component(Rom_fs *rom_fs,
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Rpc_entrypoint *ds_ep,
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const char *args)
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:
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_rom_module(_find_rom(rom_fs, args)),
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_ds(_rom_module ? _rom_module->size() : 0,
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_rom_module ? _rom_module->addr() : 0, CACHED, false, 0),
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_ds_ep(ds_ep)
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{
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/* ROM module not found */
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if (!_rom_module)
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throw Root::Invalid_args();
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_ds_cap = static_cap_cast<Rom_dataspace>(_ds_ep->manage(&_ds));
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}
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Rom_session_component::~Rom_session_component()
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{
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_ds_ep->dissolve(&_ds);
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}
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