109 lines
2.8 KiB
C++
109 lines
2.8 KiB
C++
/*
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* \brief Specific core implementations
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* \author Stefan Kalkowski
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* \date 2012-10-24
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*/
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/*
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* Copyright (C) 2012-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#include <drivers/trustzone.h>
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/* core includes */
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#include <platform.h>
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#include <board.h>
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#include <pic.h>
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#include <cpu.h>
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#include <trustzone.h>
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#include <csu.h>
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using namespace Genode;
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/* monitor exception vector address */
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extern int _mon_kernel_entry;
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bool secure_irq(unsigned const i)
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{
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using namespace Csu_config;
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if (i == Board::EPIT_1_IRQ) return true;
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if (i == Board::EPIT_2_IRQ) return true;
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if (i == Board::I2C_2_IRQ) return SECURE_I2C;
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if (i == Board::I2C_3_IRQ) return SECURE_I2C;
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if (i == Board::ESDHCV2_1_IRQ) return SECURE_ESDHC;
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if (i >= Board::GPIO1_IRQL && i <= Board::GPIO4_IRQH) return SECURE_GPIO;
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if (i >= Board::GPIO5_IRQL && i <= Board::GPIO7_IRQH) return SECURE_GPIO;
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return false;
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}
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void Kernel::init_trustzone(Pic & pic)
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{
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using namespace Genode;
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/* set exception vector entry */
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Cpu::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
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/* enable coprocessor 10 + 11 access for TZ VMs */
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Cpu::Nsacr::access_t v = 0;
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Cpu::Nsacr::Cpnsae10::set(v, 1);
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Cpu::Nsacr::Cpnsae11::set(v, 1);
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Cpu::Nsacr::write(v);
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/* configure non-secure interrupts */
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for (unsigned i = 0; i < Pic::NR_OF_IRQ; i++) {
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if (!secure_irq(i)) { pic.unsecure(i); } }
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/* configure central security unit */
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Genode::Csu csu(Board::CSU_BASE);
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}
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Native_region * Platform::_ram_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Trustzone::SECURE_RAM_BASE, Trustzone::SECURE_RAM_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ 0x07000000, 0x1000000 }, /* security controller */
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{ 0x10000000, 0x30000000 }, /* SATA, IPU, GPU */
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{ 0x50000000, 0x20000000 }, /* Misc. */
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{ Trustzone::NONSECURE_RAM_BASE, Trustzone::NONSECURE_RAM_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core UART */
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{ Board::UART_1_MMIO_BASE, Board::UART_1_MMIO_SIZE },
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/* core timer */
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{ Board::EPIT_1_MMIO_BASE, Board::EPIT_1_MMIO_SIZE },
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/* interrupt controller */
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{ Board::IRQ_CONTROLLER_BASE, Board::IRQ_CONTROLLER_SIZE },
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/* central security unit */
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{ Board::CSU_BASE, Board::CSU_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Cpu::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }
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