786fe805da
On ARM it's relevant to not only distinguish between ordinary cached memory and write-combined one, but also having non-cached memory too. To insert the appropriated page table entries e.g.: in the base-hw kernel, we need to preserve the information about the kind of memory from allocation until the pager resolves a page fault. Therefore, this commit introduces a new Cache_attribute type, and replaces the write_combined boolean with the new type where necessary.
36 lines
845 B
C++
36 lines
845 B
C++
/*
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* \brief Export RAM dataspace as shared memory object (dummy)
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* \author Norman Feske
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* \date 2006-07-03
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*/
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/*
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* Copyright (C) 2006-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* core-local includes */
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#include <ram_session_component.h>
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#include <map_local.h>
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namespace Fiasco {
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#include <l4/sys/cache.h>
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}
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using namespace Genode;
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void Ram_session_component::_export_ram_ds(Dataspace_component *ds) { }
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void Ram_session_component::_revoke_ram_ds(Dataspace_component *ds) { }
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void Ram_session_component::_clear_ds(Dataspace_component *ds)
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{
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memset((void *)ds->phys_addr(), 0, ds->size());
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if (ds->cacheability() != CACHED)
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Fiasco::l4_cache_dma_coherent(ds->phys_addr(), ds->phys_addr() + ds->size());
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}
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