genode/repos/base-hw/lib/mk/spec/riscv
Mark Vels 1668983efa base-hw: RISC-V Rocket Core on Zynq
This commit adds rocket core on the Zynq FPGA support to base HW. It also takes
advantage of the new timer infrastructure introduced with the privileged 1.8 and
adds improved TLB flush support.

fixes #1880
2016-02-26 11:36:51 +01:00
..
base-common.mk base-hw: initial RISC-V support 2016-02-26 11:36:51 +01:00
core.mk base-hw: RISC-V Rocket Core on Zynq 2016-02-26 11:36:51 +01:00
startup.mk base-hw: initial RISC-V support 2016-02-26 11:36:51 +01:00