Commit Graph

4 Commits

Author SHA1 Message Date
Stefan Kalkowski
1cbd77c806 hw: implement multi-processor support for i.MX8
Fix #3520
2019-11-19 14:42:22 +01:00
Stefan Kalkowski
875858b2cc hw: integrate interrupt controllers into board.h
Additionally, unify more implementation details in between different
usage patterns of ARM's generic interrupt controller (v2)

Ref #3445
2019-08-13 12:02:26 +02:00
Norman Feske
6b289a1423 base/core: use references instead of pointers
This patch replaces the former prominent use of pointers by references
wherever feasible. This has the following benefits:

* The contract between caller and callee becomes more obvious. When
  passing a reference, the contract says that the argument cannot be
  a null pointer. The caller is responsible to ensure that. Therefore,
  the use of reference eliminates the need to add defensive null-pointer
  checks at the callee site, which sometimes merely exist to be on the
  safe side. The bottom line is that the code becomes easier to follow.

* Reference members must be initialized via an object initializer,
  which promotes a programming style that avoids intermediate object-
  construction states. Within core, there are still a few pointers
  as member variables left though. E.g., caused by the late association
  of 'Platform_thread' objects with their 'Platform_pd' objects.

* If no pointers are present as member variables, we don't need to
  manually provide declarations of a private copy constructor and
  an assignment operator to avoid -Weffc++ errors "class ... has
  pointer data members [-Werror=effc++]".

This patch also changes a few system bindings on NOVA and Fiasco.OC,
e.g., the return value of the global 'cap_map' accessor has become a
reference. Hence, the patch touches a few places outside of core.

Fixes #3135
2019-02-12 10:33:13 +01:00
Stefan Kalkowski
8e13b376b0 hw: improve cross-cpu synchronization
This commit addresses several multiprocessing issues in base-hw:

* it reworks cross-cpu maintainance work for TLB invalidation by
  introducing a generic Inter_processor_work and removes the so
  called Cpu_domain_update
* thereby it solves the cross-cpu thread destruction, when the
  corresponding thread is active on another cpu (fix #3043)
* it adds the missing TLB shootdown for x86 (fix #3042)
* on ARM it removes the TLB shootdown via IPIs, because this
  is not needed on the multiprocessing ARM platforms we support
* it enables the per-cpu initialization of the kernel's cpu
  objects, which means those object initialization is executed
  by the proper cpu
* it rollbacks prior decision to make multiprocessing an aspect,
  but puts back certain 'smp' mechanisms (like cross-cpu lock)
  into the generic code base for simplicity reasons
2019-01-07 12:25:44 +01:00