ehmry/genode
ehmry/genode
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d8a10448bb
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13 Commits

Author SHA1 Message Date
Reto Buerki
d8a10448bb hw_x86_64: Make Idt member functions non-static 
Add appropriate Idt object to Genode::Cpu class. Update the hard-coded
TSS base address.
 2015-03-27 11:53:24 +01:00
Adrian-Ken Rueegsegger
4946f21302 hw_x86_64: Set base address and limit of TSS descriptor 
The limit is set to match the TSS size - 1 and the base address is
hardcoded to the *current* address of the TSS instance (0x3a1100).

TODO: Set the base address using the 'tss' label. If the TSS descriptor
      format were not so utterly unusable this would be straightforward.
      Changes to the code that indirectly lead to a different location
      of the tss result in #GP since the base address will be invalid.
 2015-03-27 11:53:23 +01:00
Adrian-Ken Rueegsegger
03929b3cc9 hw_x86_64: Add 64-bit user code and data segments to GDT 
The new entries specify a 64-bit code segment with DPL 3 at index 3 and a
64-bit data segment with DPL 3 at index 4.

These segments are needed for transitioning to user mode.
 2015-03-27 11:53:19 +01:00
Adrian-Ken Rueegsegger
51d515c77f hw_x86_64: Explicitly set up segment selectors during boot 2015-03-27 11:53:18 +01:00
Reto Buerki
0f624cdde7 hw_x86_64: Perform indirect long jump to 64-bit code 2015-03-27 11:53:18 +01:00
Reto Buerki
15d0e86592 hw_x86_64: Load Global Descriptor Table register 2015-03-27 11:53:17 +01:00
Reto Buerki
27191b17ce hw_x86_64: Declare Global Descriptor Table (GDT) in .data 
The table specifies a 64-bit code segment descriptor at index 1, a
64-bit data segment descriptor at index 2 and a task segment descriptor
at index 3.
 2015-03-27 11:53:17 +01:00
Reto Buerki
59bba7624f hw_x86_64: Set system control flags of cr0 register 
Enable paging, write protection, caching and native FPU error reporting,
see Intel SDM Vol. 3A, section 2.5.
 2015-03-27 11:53:17 +01:00
Reto Buerki
032fc3b190 hw_x86_64: Enable IA-32e mode and execute-disable 
Set bits 8 (LME) and 11 (NXE) in the IA32_EFER MSR to enable IA-32e mode
and execute-disable.
 2015-03-27 11:53:17 +01:00
Reto Buerki
d23cd7e5ff hw_x86_64: Load initial pagetable address into cr3 2015-03-27 11:53:17 +01:00
Reto Buerki
bafb893a70 hw_x86_64: Declare initial pagetables in .data segment 
The table specifies the initial identity mapping for the memory region
from 2 MiB to 4 MiB using one 2 MiB mapping.
 2015-03-27 11:53:17 +01:00
Reto Buerki
be430b9648 hw_x86_64: Enable Physical Address Extension (PAE) 
This is a prerequisite for IA-32e mode.
 2015-03-27 11:53:16 +01:00
Norman Feske
a974726e26 hw: skeleton for building on x86_64 
This patch contains the initial code needed to build and bootstrap the
base-hw kernel on x86 64-bit platforms. It gets stuck earlier
because the binary contains 64-bit instructions, but it is started in
32-bit mode. The initial setup of page tables and switch to long mode is
still missing from the crt0 code.
 2015-03-27 11:53:16 +01:00