Commit Graph

25 Commits

Author SHA1 Message Date
Stefan Kalkowski 458b4d6fc4 base: redesign object pool using lambda interface
Instead of returning pointers to locked objects via a lookup function,
the new object pool implementation restricts object access to
functors resp. lambda expressions that are applied to the objects
within the pool itself.

Fix #884
Fix #1658
2015-09-09 15:14:28 +02:00
Stefan Kalkowski eafe5e81e3 core: unify and simplify paging code (Fix #1641)
For most platforms except of NOVA a distinction between pager entrypoint
and pager activation is not needed, and only exists due to historical
reasons. Moreover, the pager thread's execution path is almost identical
between most platforms excluding NOVA, HW, and Fisco.OC. Therefore,
this commit unifies the pager loop for the other platforms, and removes
the pager activation class.
2015-08-21 10:58:59 +02:00
Stefan Kalkowski 0f05fa6fd4 base: resolve dead lock in weak pointer templates
This commit eliminates the mutual interlaced taking of destruction lock,
list lock and weak pointer locks that could lead to a dead-lock situation
when a lock pointer was tried to construct while a weak object is in
destruction progress.
Now, all weak pointers are invalidated and dequeued at the very
beginning of the weak object's destruction. Moreover, before a weak pointer
gets invalidated during destruction of a weak object, it gets dequeued, and
the list lock is freed again to avoid the former dead-lock.

Fix #1607
2015-07-21 09:30:04 +02:00
Stefan Kalkowski 2a351215f4 base: remove pager code from public API
Fix #1593
2015-07-01 14:46:15 +02:00
Norman Feske 959572968d core: provide thread exec times via TRACE service
This patch enable clients of core's TRACE service to obtain the
execution times of trace subjects (i.e., threads). The execution time is
delivered as part of the 'Subject_info' structure.

Right now, the feature is available solely on NOVA. On all other base
platforms, the returned execution times are 0.

Issue #813
2015-06-22 14:43:38 +02:00
Stefan Kalkowski 73c3a81e0b base: make PD session upgradeable
Ref #1443
2015-05-26 09:40:02 +02:00
Christian Prochaska d9825cd708 codezero: move first container to higher address
Fixes #1525
2015-05-26 09:39:51 +02:00
Alexander Boettcher e84284c0cd base: remove shared irq from core
Cleanup commit after all relevant drivers got adapted to use the x86 platform
driver (pci_drv).

Issue #1471
2015-05-26 09:39:47 +02:00
Alexander Boettcher d998df3b7f base: extend irq session to support MSIs
Works on base-nova and base-foc, the other kernels have no MSI support.

Issue #1216
2015-05-20 17:39:14 +02:00
Christian Helmuth c6857b3019 thread: remove weak implementation of myself() 2015-05-06 10:55:24 +02:00
Christian Helmuth 98def2488a thread: move Thread_base::myself() to separate file
The thread library (thread.cc) in base-foc shared 95% of the code with
the generic implementation except myself(). Therefore, its
implementation is now separated from the other generic sources into
myself.cc, which allows base-foc to use a foc-specific primitive to
enable our base libraries in L4Linux.

Issue #1491
2015-05-06 10:55:17 +02:00
Martin Stein c9272937e7 CPU session: apply quota via relative weightings
Physical CPU quota was previously given to a thread on construction only
by directly specifying a percentage of the quota of the according CPU
session. Now, a new thread is given a weighting that can be any value.
The physical counter-value of such a weighting depends on the weightings
of the other threads at the CPU session. Thus, the physical quota of all
threads of a CPU session must be updated when a weighting is added or
removed. This is each time the session creates or destroys a thread.

This commit also adapts the "cpu_quota" test in base-hw accordingly.

Ref #1464
2015-05-06 10:55:16 +02:00
Alexander Boettcher faa25e1df6 base: make irq_session asynchronous
second step

options: factor out common parts of irq_session_component.cc
options: use on foc arm no proxy threads

Fixes #1456
2015-04-23 16:47:58 +02:00
Alexander Boettcher e2cbc7c5b3 base: unify some irq_session headers
remove repos/base-*/include/irq_session headers and use only a unification
from   repos/base/include/irq_session

first step

Issue #1456
2015-04-23 16:47:57 +02:00
Stefan Kalkowski a168c9d6ce core: remove global capability id counter
The global capability ID counter is not used by NOVA and Fiasco.OC
and in the future not needed by base-hw too. Thereby, remove the static
counter variable from the generic code base and add it where appropriated.

Ref #1443
2015-04-17 16:13:19 +02:00
Stefan Kalkowski 358380046c base: assign allocator and quota to platform pd
Enable platform specific allocations and ram quota accounting for
protection domains. Needed to allocate object identity references
in the base-hw kernel when delegating capabilities via IPC.
Moreover, it can be used to account translation table entries in the
future.

Ref #1443
2015-04-17 16:13:19 +02:00
Alexander Boettcher 1f8fad8fa1 base: refactor signal_transmitter::submit
Move it to platform specific .cc file, so that it may get re-implemented
platform specifically if needed.

Issue #1446
2015-03-19 09:32:52 +01:00
Norman Feske f9269f5cb1 Adapt base-codezero to new ports mechanism
Fixes #1425
2015-03-02 12:19:12 +01:00
Josef Söntgen c706b1c0a7 run: modularize run tool 2015-01-26 12:28:40 +01:00
Norman Feske a0abb093ed Remove output-section fill from linker scripts
The linker scripts use to fill alignment gaps within the text section
with the magic value 0x90909090, which correponds to the opcodes of four
nop instructions on x86. This patch removes this value because it
apparently solves no problem. If, for some reason (e.g., due to a dangling
pointer) a thread executes instructions within alignment paddings, NOP
instructions are not any better than any other instruction. The program
will eventually execute the instructions after the padding, which is
most likely fatal. It would be more reasonable to fill the padding with
the opcode of an illegal instruction so that such an error can be
immediately detected. That said, I cannot remember a single instance,
where the fill value has helped us during debugging.

Even if the mechanism served a purpose on x86, it is still better to
remove it because it does not equally work on the other architectures
where the linker scripts are used. I.e., on ARM, the opcode 0x90909090
is not a NOP instruction.
2015-01-20 11:25:59 +01:00
Martin Stein 8f9355b360 thread API & CPU session: accounting of CPU quota
In the init configuration one can configure the donation of CPU time via
'resource' tags that have the attribute 'name' set to "CPU" and the
attribute 'quantum' set to the percentage of CPU quota that init shall
donate. The pattern is the same as when donating RAM quota.

! <start name="test">
!   <resource name="CPU" quantum="75"/>
! </start>

This would cause init to try donating 75% of its CPU quota to the child
"test".  Init and core do not preserve CPU quota for their own
requirements by default as it is done with RAM quota.

The CPU quota that a process owns can be applied through the thread
constructor. The constructor has been enhanced by an argument that
indicates the percentage of the programs CPU quota that shall be granted
to the new thread. So 'Thread(33, "test")' would cause the backing CPU
session to try to grant 33% of the programs CPU quota to the thread
"test". By now, the CPU quota of a thread can't be altered after
construction. Constructing a thread with CPU quota 0 doesn't mean the
thread gets never scheduled but that the thread has no guaranty to receive
CPU time. Such threads have to live with excess CPU time.

Threads that already existed in the official repositories of Genode were
adapted in the way that they receive a quota of 0.

This commit also provides a run test 'cpu_quota' in base-hw (the only
kernel that applies the CPU-quota scheme currently). The test basically
runs three threads with different physical CPU quota. The threads simply
count for 30 seconds each and the test then checks wether the counter
values relate to the CPU-quota distribution.

fix #1275
2014-11-28 12:02:37 +01:00
Sebastian Sumpf 8738673625 base-codezero: Add dummy functions to syscall library
Issue #1280
2014-10-30 13:36:14 +01:00
Stefan Kalkowski 786fe805da base: introduce caching attributes (fix #1184)
On ARM it's relevant to not only distinguish between ordinary cached memory
and write-combined one, but also having non-cached memory too. To insert the
appropriated page table entries e.g.: in the base-hw kernel, we need to preserve
the information about the kind of memory from allocation until the pager
resolves a page fault. Therefore, this commit introduces a new Cache_attribute
type, and replaces the write_combined boolean with the new type where necessary.
2014-06-26 10:57:26 +02:00
Christian Prochaska 078883fda3 base: interface for D- and I-cache synchronization
On ARM, when machine instructions get written into the data cache
(for example by a JIT compiler), one needs to make sure that the
instructions get written out to memory and read from memory into
the instruction cache before they get executed. This functionality
is usually provided by a kernel syscall and this patch adds a generic
interface for Genode applications to use it.

Fixes #1153.
2014-05-27 11:14:45 +02:00
Norman Feske ca971bbfd8 Move repositories to 'repos/' subdirectory
This patch changes the top-level directory layout as a preparatory
step for improving the tools for managing 3rd-party source codes.
The rationale is described in the issue referenced below.

Issue #1082
2014-05-14 16:08:00 +02:00