Commit Graph

32 Commits

Author SHA1 Message Date
Norman Feske 5fe29e8e4a Express affinities via Cartesian coordinates
This patch introduces new types for expressing CPU affinities. Instead
of dealing with physical CPU numbers, affinities are expressed as
rectangles in a grid of virtual CPU nodes. This clears the way to
conveniently assign sets of adjacent CPUs to subsystems, each of them
managing their respective viewport of the coordinate space.

By using 2D Cartesian coordinates, the locality of CPU nodes can be
modeled for different topologies such as SMP (simple Nx1 grid), grids of
NUMA nodes, or ring topologies.
2013-08-13 17:08:24 +02:00
Alexander Boettcher 4ae1faf14d base: add affinity support to pager construction
Propagating the affinity information is needed to allow for assigning
a pager thread that is local to the CPU of the to-be-created thread.

issue #814
2013-08-13 17:08:23 +02:00
Martin Stein e20b773bef hw & arm: use sp to hand out main UTCB pointer
Also don't hand out UTCB pointers to cores main thread and to threads
other than main threads.

Ref #766
2013-07-05 12:37:42 +02:00
Martin Stein 5a3e340699 hw: initialize Platform_thread::_main_thread right
Ref #766
2013-07-05 12:37:42 +02:00
Stefan Kalkowski ae291b557d Extend base-hw specific vm-session (fix #738)
Introduce pause syscall for VM objects, and extend the vm-session interface
to support it.
2013-05-10 11:16:13 +02:00
Martin Stein 4b224dd67e base-hw: store Platform_pd pointer in Kernel::Pd
This enables the kernel to print out the label of the program
a thread belongs to.

fix #662
2013-04-09 14:24:25 +02:00
Martin Stein ea7ed5947a base: hand over Pd_connection label to Platform_pd
fix: #656
2013-04-08 11:42:24 +02:00
Norman Feske 21de42c45d core: Introduce 'Address_space' interface
The new core-internal 'Address_space' interface enables cores RM service
to flush mappings of a PD in which a given 'Rm_client' thread resides.
Prior this patch, each platform invented their own way to flush mappings
in the respective 'rm_session_support.cc' implementation. However, those
implementations used to deal poorly with some corner cases. In
particular, if a PD session was destroyed prior a RM session, the RM
session would try to use no longer existing PD session. The new
'Address_space' uses the just added weak-pointer mechanism to deal with
this issue.

Furthermore, the generic 'Rm_session_component::detach' function has
been improved to avoid duplicated unmap operations for platforms that
implement the 'Address_space' interface. Therefore, it is related to
issue #595. Right now, this is OKL4 only, but other platforms will follow.
2013-03-12 21:53:08 +01:00
Martin Stein 438b8be2fa base-hw: destroy signal contexts, generic signal.h
fix #641
2013-02-22 20:28:28 +01:00
Martin Stein 02fccf5cb2 base-hw: fix bug in 'Platform_thread::pager()' 2013-02-20 19:37:25 +01:00
Norman Feske 73ab30c22c Update copyright headers to 2013 2013-01-10 21:44:47 +01:00
Martin Stein 0d7c6efa84 base-hw: Platform_thread::cancel_blocking
Ref #589
2013-01-08 11:36:52 +01:00
Martin Stein 4fb5c23a3c base-hw: don't use 'long' unnecessarily
Fix #581
2013-01-08 11:36:52 +01:00
Martin Stein 7f2f2d9120 base-hw: ease core build
Merge core only libs into the target make-files.

Use base-hw specific Board drivers that inherit
from generic Board_base.

Use Page_flags::access_t instead of additional
page_flags_t.

Fix #570
2013-01-08 11:36:52 +01:00
Martin Stein ee6f25a028 base-hw: reorganize core-driver headers
Ref #570
2013-01-08 11:36:51 +01:00
Martin Stein f1d599ae8a base: rename generic Board drivers Board_base
To enable a repo to name its specific board driver 'Board'.

Fix #569
2013-01-08 11:36:51 +01:00
Martin Stein bc24a21658 base-hw: embed kernel space into platform thread
Instead of allocating and freeing the space that is needed for the
kernel thread objects from core, wich is not convenient with the
quota system, platform thread now holds the space as array by
itself.

Unfortunately we cannot measure the space size by a static function
anymore, so kernel thread had to be moved from kernel.cc into its
own header. This way platform thread can use sizeof().

Fix #543
2012-11-30 16:23:16 +01:00
Norman Feske 0dbb5e1696 Propagate 'Range_allocator::alloc_aligned' errors
This patch reflects eventual allocation errors in a more specific way to
the caller of 'alloc_aligned', in particular out-of-metadata and
out-of-memory are considered as different conditions.

Related to issue #526.
2012-11-28 22:51:09 +01:00
Martin Stein 05f5999e71 cpu_session: Access thread state by value 2012-11-23 12:20:22 +01:00
Martin Stein 4dadd6a437 base-hw: Read and write whole thread states.
By now there is no use case for read/write a single register
of a thread state. Thus the new syscalls 'read_thread_state' and
'write_thread_state' replace the old ones 'read_register' and
'write_register'.
2012-11-22 09:21:53 +01:00
Martin Stein 6cb89f79e3 base_hw & arm_v7: Use write-back caching.
Add 'resume_faulter' syscall that is similar to 'resume_thread', but
is called only when resuming a thread after resolving its pagefault.
This way the kernel can flush caches after resolving a pagefault. This is
because by now the MMU doesn't use caches when doing a pagetable walk.
2012-11-22 09:21:53 +01:00
Martin Stein 4723b08322 base_hw: Use TLB-specific 'struct Page_flags'.
'Page_flags' maps application-specific memory attributes
to the TLB-specific memory attributes. Thereby it avoids
functions with lots of parameters, by declaring appropriate
bitfields on a single POD value.
2012-11-22 09:21:53 +01:00
Martin Stein 8d03312528 base_hw: Use board-specific 'Core_tlb'.
'Core_tlb' ensures that core never throws pagefaults,
in contrast to its base 'Tlb' that is planned to use displacement
in the future.

'Core_tlb' enables the application of differenet memory attributes
in core, according to the board specific partitioning of the physical
address space. This way it enables caching in core.
2012-11-14 16:36:51 +01:00
Martin Stein 4d2a3de0ee base_hw: Rename 'Software_tlb' 'Tlb'. 2012-11-14 16:36:51 +01:00
Martin Stein dfcf55ff6e base_hw: Implement TLB as member of a kernel PD. 2012-11-14 16:36:51 +01:00
Martin Stein 53156de9f4 base_hw & arm: Memory attributes and light caching.
Enable caches. Core is not cached by now. This is because kernel
creates core space and doesn't know any memory attributes by now.
Cacheable pages are cached write-through without write-allocate.

Caching and write-combining is not supported for IOMEM by now.
2012-11-14 16:36:51 +01:00
Martin Stein 31d57a6257 Nested init on i.MX31 via base_hw. Rework base_hw.
Implies support for the ARMv6 architecture through 'base-hw'.

Get rid of 'base/include/drivers' expect of 'base/include/drivers/uart'.

Merge with the support for trustzone on VEA9X4 that came from
Stefan Kalkowski.

Leave board drivers in 'base/include/platform'.

Rework structure of the other drivers that were moved to
'base_hw/src/core' and those that came with the trustzone support.

Beautify further stuff in 'base_hw'.

Test 'nested_init' with 'hw_imx31' (hardware) and 'hw_panda_a2' (hardware),
'demo' and 'signal' with 'hw_pbxa9' (qemu) and 'hw_vea9x4'
(hardware, no trustzone), and 'vmm' with 'hw_vea9x4'
(hardware, with trustzone).
2012-11-14 16:36:41 +01:00
Stefan Kalkowski 8393ac6895 base-hw: implement vm_session for TrustZone
* Introduces Schedule_context
* Use fast-interrupts or normal interrupts
* Add mode-transition between secure/non-secure world
* Limit system resources for Genode apps due to non-secure world

This commit implements the newly introduced Vm session interface to be used
on top of TrustZone capable Armv7 CPUs. Therefore a new Schedule_context is
introduced in the kernel. Threads and Vms are both Schedule_contexts used
by the scheduler. In contrast to a thread a vm uses a different assembler
mode switch to the non-secure, virtual world, as well as another exception
is used, when the non-secure world is left. For both worlds to co-exist
the interrupt-controller needs to be configured, so that the secure (Genode)
world uses fast-interrupts only, and the non-secure world only legacy
interrupts.
The only TrustZone capable platform the base-hw kernel works on top of
is the CoreTile Express 9x4 for the Versatile Express motherboard. For a
virtual machine working properly on top some platform resources must be
reserved. Therefore there exist two flavours of this platform now, one with
the 'trustzone' spec-variable enabled, and one without. If 'trustzone' is
specified most platform resources (DDR-RAM, and most IRQs) are reserved
for the Vm and not available to the secure Genode world.
2012-10-29 10:08:30 +01:00
Stefan Kalkowski 94ea3a0acb Move away drivers from generic base-repository
Driver definitions which are used by kernel/core in base-hw, and also by other
drivers (e.g. from the os repository) have to reside in the generic
base-repository, for instance some uart drivers. All drivers which are
interesting for one of the sites only (sp804 for timer driver, or
cortex_a9 cpu driver for base-hw) should reside in the respective repos.

Factorize cpu context out of Cortex A9 specific definitions. Moreover, there
is already a Cpu_state object containing all common ARM registers. We use
this as a base for the cpu context switching done by the base-hw kernel.
The Cpu_state class get extended by a cpu-exception field, that stores the kind
of exception raised when the corresponding context got interrupted. This
information is used not only by the base-hw kernel, but also by the TrustZone
VMM that is build currently.
2012-10-29 10:08:29 +01:00
Martin Stein 9dba710989 Enable 'signal' test on 'base_hw'. 2012-10-12 13:10:45 +02:00
Norman Feske 83bdfea9b0 Extend Cpu_session with thread-affinity API
This patch introduces the functions 'affinity' and 'num_cpus' to the CPU
session interface. The interface extension will allow the assignment of
individual threads to CPUs. At this point, it is just a stub with no
actual platform support.
2012-09-05 10:25:04 +02:00
Martin Stein ff65f6f021 Run Genode directly on hardware with 'base-hw'. 2012-08-03 12:06:37 +02:00