hw_x86_64: Reserve space for TSS in mtc region
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@ -247,6 +247,16 @@
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_mt_idt:
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.space 1 << MIN_PAGE_SIZE_LOG2
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/***********************************************
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** Space for 64-bit Task State Segment (TSS) **
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** See Intel SDM Vol. 3A, section 7.7 **
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***********************************************/
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.global _mt_tss
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.align 8
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_mt_tss:
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.space 104
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/******************************************
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** Global Descriptor Table (GDT) **
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** See Intel SDM Vol. 3A, section 3.5.1 **
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