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@ -11,15 +11,46 @@ namespace Fiasco {
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#include <l4/sys/task.h>
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#include <l4/sys/task.h>
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enum Cap_selectors {
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enum Cap_selectors {
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TASK_CAP = L4_BASE_TASK_CAP,
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PARENT_CAP = 0x8UL << L4_CAP_SHIFT,
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/**********************************************
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THREADS_BASE_CAP = 0x9UL << L4_CAP_SHIFT,
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** Capability seclectors controlled by core **
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**********************************************/
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TASK_CAP = L4_BASE_TASK_CAP, /* use the same task cap selector
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like L4Re for compatibility in
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L4Linux */
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/*
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* To not clash with other L4Re cap selector constants (e.g.: L4Linux)
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* leave the following selectors (2-7) empty
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*/
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PARENT_CAP = 0x8UL << L4_CAP_SHIFT, /* cap to parent session */
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/*
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* Each thread has a designated slot in the core controlled cap
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* selector area, where its ipc gate capability (for server threads),
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* its irq capability (for locks), and the capability to its pager
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* gate are stored
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*/
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THREAD_AREA_BASE = 0x9UL << L4_CAP_SHIFT, /* offset to thread area */
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THREAD_AREA_SLOT = 0x3UL << L4_CAP_SHIFT, /* size of one thread slot */
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THREAD_GATE_CAP = 0, /* offset to the ipc gate
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cap selector in the slot */
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THREAD_PAGER_CAP = 0x1UL << L4_CAP_SHIFT, /* offset to the pager
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cap selector in the slot */
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THREAD_IRQ_CAP = 0x2UL << L4_CAP_SHIFT, /* offset to the irq cap
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selector in the slot */
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MAIN_THREAD_CAP = THREAD_AREA_BASE + THREAD_GATE_CAP, /* shortcut to the
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main thread's
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gate cap */
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/*********************************************************
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** Capability seclectors controlled by the task itself **
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*********************************************************/
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USER_BASE_CAP = 0x200UL << L4_CAP_SHIFT,
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USER_BASE_CAP = 0x200UL << L4_CAP_SHIFT,
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THREAD_GATE_CAP = 0,
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THREAD_PAGER_CAP = 0x1UL << L4_CAP_SHIFT,
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THREAD_IRQ_CAP = 0x2UL << L4_CAP_SHIFT,
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THREAD_CAP_SLOT = THREAD_IRQ_CAP + L4_CAP_SIZE,
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MAIN_THREAD_CAP = THREADS_BASE_CAP + THREAD_GATE_CAP
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};
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};
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enum Utcb_regs {
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enum Utcb_regs {
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@ -53,7 +53,7 @@ int Platform_pd::bind_thread(Platform_thread *thread)
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else
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else
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thread->_utcb =
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thread->_utcb =
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reinterpret_cast<l4_utcb_t*>(utcb_area_start() + i * L4_UTCB_OFFSET);
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reinterpret_cast<l4_utcb_t*>(utcb_area_start() + i * L4_UTCB_OFFSET);
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Native_thread cap_offset = THREADS_BASE_CAP + i * THREAD_CAP_SLOT;
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Native_thread cap_offset = THREAD_AREA_BASE + i * THREAD_AREA_SLOT;
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thread->_gate.remote = cap_offset + THREAD_GATE_CAP;
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thread->_gate.remote = cap_offset + THREAD_GATE_CAP;
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thread->_pager.remote = cap_offset + THREAD_PAGER_CAP;
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thread->_pager.remote = cap_offset + THREAD_PAGER_CAP;
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thread->_irq.remote = cap_offset + THREAD_IRQ_CAP;
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thread->_irq.remote = cap_offset + THREAD_IRQ_CAP;
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@ -118,7 +118,7 @@ static void prepare_l4re_env()
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env->mem_alloc = L4_INVALID_CAP;
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env->mem_alloc = L4_INVALID_CAP;
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env->log = L4_INVALID_CAP;
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env->log = L4_INVALID_CAP;
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env->main_thread = main_thread_cap.dst();
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env->main_thread = main_thread_cap.dst();
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env->rm = Fiasco::THREADS_BASE_CAP + Fiasco::THREAD_PAGER_CAP;
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env->rm = Fiasco::THREAD_AREA_BASE + Fiasco::THREAD_PAGER_CAP;
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}
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}
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