base-hw: ease core build
Merge core only libs into the target make-files. Use base-hw specific Board drivers that inherit from generic Board_base. Use Page_flags::access_t instead of additional page_flags_t. Fix #570
This commit is contained in:
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ee6f25a028
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7f2f2d9120
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@ -22,6 +22,7 @@
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namespace Genode
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namespace Genode
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{
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{
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class Platform_thread;
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class Platform_thread;
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class Tlb;
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typedef int volatile Native_lock;
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typedef int volatile Native_lock;
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typedef Platform_thread * Native_thread;
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typedef Platform_thread * Native_thread;
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@ -17,11 +17,10 @@
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/* Genode includes */
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/* Genode includes */
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#include <base/syscall_types.h>
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#include <base/syscall_types.h>
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class Tlb;
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namespace Genode
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namespace Genode
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{
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{
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class Platform_thread;
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class Platform_thread;
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class Tlb;
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}
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}
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namespace Kernel
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namespace Kernel
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@ -208,13 +207,13 @@ namespace Kernel
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*
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*
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* Restricted to core threads.
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* Restricted to core threads.
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*/
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*/
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inline Tlb *
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inline Genode::Tlb *
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start_thread(Genode::Platform_thread * const phys_pt, void * ip, void * sp,
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start_thread(Genode::Platform_thread * const phys_pt, void * ip, void * sp,
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unsigned int cpu_no)
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unsigned int cpu_no)
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{
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{
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return (Tlb *)syscall(START_THREAD, (Syscall_arg)phys_pt,
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return (Genode::Tlb *)syscall(START_THREAD, (Syscall_arg)phys_pt,
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(Syscall_arg)ip, (Syscall_arg)sp,
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(Syscall_arg)ip, (Syscall_arg)sp,
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(Syscall_arg)cpu_no);
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(Syscall_arg)cpu_no);
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}
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}
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@ -15,7 +15,7 @@
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#define _INCLUDE__PL011__DRIVERS__SERIAL_LOG_H_
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#define _INCLUDE__PL011__DRIVERS__SERIAL_LOG_H_
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/* Genode includes */
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/* Genode includes */
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#include <drivers/board_base.h>
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#include <board.h>
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#include <drivers/uart/pl011_base.h>
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#include <drivers/uart/pl011_base.h>
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namespace Genode
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namespace Genode
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@ -33,8 +33,8 @@ namespace Genode
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* \param baud_rate targeted transfer baud-rate
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* \param baud_rate targeted transfer baud-rate
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*/
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*/
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Serial_log(unsigned const baud_rate) :
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Serial_log(unsigned const baud_rate) :
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Pl011_base(Board_base::PL011_0_MMIO_BASE,
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Pl011_base(Board::PL011_0_MMIO_BASE,
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Board_base::PL011_0_CLOCK, baud_rate)
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Board::PL011_0_CLOCK, baud_rate)
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{ }
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{ }
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};
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};
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}
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}
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@ -15,7 +15,7 @@
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#define _INCLUDE__PLATFORM__IMX31__DRIVERS__SERIAL_LOG_H_
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#define _INCLUDE__PLATFORM__IMX31__DRIVERS__SERIAL_LOG_H_
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/* Genode includes */
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/* Genode includes */
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#include <imx31/board.h>
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#include <board.h>
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#include <drivers/uart/imx31_uart_base.h>
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#include <drivers/uart/imx31_uart_base.h>
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namespace Genode
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namespace Genode
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@ -15,7 +15,7 @@
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#define _INCLUDE__TL16C750__DRIVERS__SERIAL_LOG_H_
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#define _INCLUDE__TL16C750__DRIVERS__SERIAL_LOG_H_
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/* Genode includes */
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/* Genode includes */
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#include <drivers/board_base.h>
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#include <board.h>
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#include <drivers/uart/tl16c750_base.h>
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#include <drivers/uart/tl16c750_base.h>
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namespace Genode
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namespace Genode
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@ -33,8 +33,8 @@ namespace Genode
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* \param baud_rate targeted transfer baud-rate
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* \param baud_rate targeted transfer baud-rate
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*/
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*/
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Serial_log(unsigned const baud_rate) :
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Serial_log(unsigned const baud_rate) :
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Tl16c750_base(Board_base::TL16C750_3_MMIO_BASE,
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Tl16c750_base(Board::TL16C750_3_MMIO_BASE,
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Board_base::TL16C750_CLOCK, baud_rate)
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Board::TL16C750_CLOCK, baud_rate)
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{ }
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{ }
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};
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};
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}
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}
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@ -1,27 +0,0 @@
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#
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# \brief Parts of core that depend on ARM
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# \author Martin Stein
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# \date 2012-04-16
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#
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# add C++ sources
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SRC_CC += syscall.cc
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# add assembly sources
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SRC_S += crt0.s boot_modules.s
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#
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# Check if there are other images wich shall be linked to core.
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# If not use a dummy boot-modules file wich includes only the symbols.
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#
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ifeq ($(wildcard $(BUILD_BASE_DIR)/boot_modules.s),)
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vpath boot_modules.s $(REP_DIR)/src/core/arm
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else
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INC_DIR += $(BUILD_BASE_DIR)
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vpath boot_modules.s $(BUILD_BASE_DIR)
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endif
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# declare source paths
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vpath syscall.cc $(REP_DIR)/src/base/arm
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vpath % $(REP_DIR)/src/core/arm
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@ -1,15 +0,0 @@
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#
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# \brief Parts of core that depend on ARMv6
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# \author Martin Stein
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# \date 2012-04-16
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#
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# add assembly sources
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SRC_S += mode_transition.s
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# declare source paths
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vpath % $(REP_DIR)/src/core/arm_v6
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# include less specific parts
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include $(REP_DIR)/lib/mk/arm/core_support.inc
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@ -1,25 +0,0 @@
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#
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# \brief Essential platform specific sources for common programs
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# \author Martin Stein
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# \date 2012-04-16
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#
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# FIXME: This is an almost verbatim copy of 'armv7a/startup.mk'. We should move
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# the common parts to a separate file.
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#
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# add libraries
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LIBS += cxx lock
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# add C++ sources
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SRC_CC += _main.cc
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# add assembly sources
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SRC_S += crt0.s syscall.cc
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# add include paths
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INC_DIR += $(REP_DIR)/src/platform $(BASE_DIR)/src/platform
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# declare source paths
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vpath crt0.s $(REP_DIR)/src/platform
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vpath _main.cc $(BASE_DIR)/src/platform
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vpath syscall.cc $(REP_DIR)/src/base/arm
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#
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# \brief Parts of core that depend on ARMv7
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# \author Martin Stein
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# \date 2012-04-16
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#
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# add assembly sources
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SRC_S += mode_transition.s
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# declare source paths
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vpath % $(REP_DIR)/src/core/arm_v7
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# include less specific parts
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include $(REP_DIR)/lib/mk/arm/core_support.inc
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@ -1,23 +0,0 @@
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#
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# \brief Generic parts of the core-support lib
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# \author Martin Stein
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# \date 2012-04-27
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core/ \
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$(BOARD_DIR) $(REP_DIR)/src/core/include $(REP_DIR)/include \
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$(BASE_DIR)/src/core/include $(BASE_DIR)/include
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# set entry point of core's first thread
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CC_OPT += -DCORE_MAIN=_main
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# add C++ sources
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SRC_CC += kernel.cc rm_session_support.cc kernel_support.cc trustzone.cc
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# add library dependencies
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LIBS += platform_support
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# declare source paths
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vpath %.cc $(REP_DIR)/src/core
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INC_DIR += $(REP_DIR)/src/base/lock
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INC_DIR += $(REP_DIR)/src/base/lock
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# declare source paths
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# declare source paths
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vpath % $(BASE_DIR)/src/base/lock
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vpath lock.cc $(BASE_DIR)/src/base/lock
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SRC_CC += pager.cc
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SRC_CC += pager.cc
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# declare source paths
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# declare source paths
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vpath % $(REP_DIR)/src/base
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vpath pager.cc $(REP_DIR)/src/base
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@ -1,17 +0,0 @@
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#
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# \brief Parts of core that depend on i.MX31
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# \author Norman Feske
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# \author Martin Stein
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# \date 2012-08-30
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#
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# declare location of core files that are board specific
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BOARD_DIR = $(REP_DIR)/src/core/imx31
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# add includes to search path
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INC_DIR += $(REP_DIR)/src/core/include/imx31
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# include less specific parts
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include $(REP_DIR)/lib/mk/arm_v6/core_support.inc
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include $(REP_DIR)/lib/mk/core_support.inc
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#
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# \brief Platform implementations specific for base-hw and i.MX31
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# \author Martin Stein
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# \date 2012-05-10
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core \
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$(REP_DIR)/src/core/include \
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$(REP_DIR)/src/core/include/imx31 \
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$(BASE_DIR)/src/core/include
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# add C++ sources
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SRC_CC += platform_support.cc platform_services.cc
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# declare source paths
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vpath % $(REP_DIR)/src/core/imx31
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vpath platform_services.cc $(BASE_DIR)/src/core
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#
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# \brief Parts of core that depend on the PandaBoard A2
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# \author Martin Stein
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# \date 2012-04-27
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#
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# declare location of core files that are board specific
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BOARD_DIR = $(REP_DIR)/src/core/panda
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# include generic parts of core support
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include $(REP_DIR)/lib/mk/arm_v7/core_support.inc
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include $(REP_DIR)/lib/mk/core_support.inc
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#
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# \brief Platform implementations specific for base-hw and Panda A2
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# \author Martin Stein
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# \date 2012-05-10
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core \
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$(REP_DIR)/src/core/include \
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$(BASE_DIR)/src/core/include
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# add C++ sources
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SRC_CC += platform_services.cc platform_support.cc
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# declare source paths
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vpath platform_services.cc $(BASE_DIR)/src/core
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vpath platform_support.cc $(REP_DIR)/src/core/panda
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#
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# \brief Parts of core that depend on the Realview PBXA9
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# \author Martin Stein
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# \date 2012-04-27
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#
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# declare location of core files that are board specific
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BOARD_DIR = $(REP_DIR)/src/core/pbxa9
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# include generic part of core support
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include $(REP_DIR)/lib/mk/arm_v7/core_support.inc
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include $(REP_DIR)/lib/mk/core_support.inc
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#
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# \brief Platform implementations specific for base-hw and PBXA9
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# \author Stefan Kalkowski
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# \date 2012-10-04
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core \
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$(REP_DIR)/src/core/include \
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$(BASE_DIR)/src/core/include
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# add C++ sources
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SRC_CC += platform_services.cc platform_support.cc
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# declare source paths
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vpath platform_services.cc $(BASE_DIR)/src/core
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vpath platform_support.cc $(REP_DIR)/src/core/pbxa9
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#
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# \brief Parts of core that depend on the Versatile VEA9X4
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# \author Martin Stein
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# \date 2012-04-27
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#
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LIBS += vea9x4_core_support
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#
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# \brief Platform implementations specific for base-hw and VEA9X4
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# \author Stefan Kalkowski
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# \date 2012-10-04
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#
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LIBS += vea9x4_platform_support
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SRC_CC += ipc.cc
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SRC_CC += ipc.cc
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# declare source paths
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# declare source paths
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vpath % $(REP_DIR)/src/base
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vpath ipc.cc $(REP_DIR)/src/base
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LIBS += slab
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LIBS += slab
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# declare source paths
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# declare source paths
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vpath % $(REP_DIR)/src/base/signal
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vpath signal.cc $(REP_DIR)/src/base/signal
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SRC_CC += thread.cc thread_bootstrap.cc thread_support.cc
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SRC_CC += thread.cc thread_bootstrap.cc thread_support.cc
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# declare source paths
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# declare source paths
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vpath thread_support.cc $(REP_DIR)/src/base/
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vpath thread_support.cc $(REP_DIR)/src/base/
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vpath % $(BASE_DIR)/src/base/thread/
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vpath thread_bootstrap.cc $(BASE_DIR)/src/base/thread/
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vpath thread.cc $(BASE_DIR)/src/base/thread/
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#
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# \brief Trustzone support for VEA9X4 with TZ enabled
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# \author Stefan Kalkowski
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# \date 2012-10-10
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#
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BOARD_DIR = $(REP_DIR)/src/core/vea9x4
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INC_DIR += $(BOARD_DIR)/trustzone
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# declare source paths
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vpath kernel_support.cc $(BOARD_DIR)/trustzone
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vpath trustzone.cc $(BOARD_DIR)/trustzone
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# include generic part of core support
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include $(REP_DIR)/lib/mk/arm_v7/core_support.inc
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include $(REP_DIR)/lib/mk/core_support.inc
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#
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# \brief Platform implementations specific for base-hw and VEA9X4 (TrustZone)
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# \author Stefan Kalkowski
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# \date 2012-10-04
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core \
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$(REP_DIR)/src/core/include \
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$(BASE_DIR)/src/core/include
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SRC_CC = platform_services.cc \
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platform_support.cc \
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|
||||||
vm_session_component.cc
|
|
||||||
|
|
||||||
vpath platform_support.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
|
||||||
vpath platform_services.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
|
||||||
vpath vm_session_component.cc $(REP_DIR)/src/core
|
|
|
@ -1,14 +0,0 @@
|
||||||
#
|
|
||||||
# \brief Trustzone support for VEA9X4 with TZ disabled
|
|
||||||
# \author Stefan Kalkowski
|
|
||||||
# \date 2012-10-10
|
|
||||||
#
|
|
||||||
|
|
||||||
# avoid building of this lib with other platforms
|
|
||||||
REQUIRES += platform_vea9x4
|
|
||||||
|
|
||||||
BOARD_DIR = $(REP_DIR)/src/core/vea9x4
|
|
||||||
|
|
||||||
# include generic part of core support
|
|
||||||
include $(REP_DIR)/lib/mk/arm_v7/core_support.inc
|
|
||||||
include $(REP_DIR)/lib/mk/core_support.inc
|
|
|
@ -1,18 +0,0 @@
|
||||||
#
|
|
||||||
# \brief Platform implementations specific for base-hw and VEA9X4
|
|
||||||
# \author Stefan Kalkowski
|
|
||||||
# \date 2012-10-04
|
|
||||||
#
|
|
||||||
|
|
||||||
# add include paths
|
|
||||||
INC_DIR += $(REP_DIR)/src/core \
|
|
||||||
$(REP_DIR)/src/core/include \
|
|
||||||
$(BASE_DIR)/src/core/include
|
|
||||||
|
|
||||||
# avoid building of this lib with other platforms
|
|
||||||
REQUIRES += platform_vea9x4
|
|
||||||
|
|
||||||
SRC_CC = platform_support.cc platform_services.cc
|
|
||||||
|
|
||||||
vpath platform_support.cc $(REP_DIR)/src/core/vea9x4
|
|
||||||
vpath platform_services.cc $(BASE_DIR)/src/core
|
|
|
@ -1,12 +1,10 @@
|
||||||
#
|
#
|
||||||
# \brief Offer build configurations that are specific to base-hw
|
# \brief Build config for targets with hw spec
|
||||||
# \author Martin Stein
|
# \author Martin Stein
|
||||||
# \date 2012-04-16
|
# \date 2012-04-16
|
||||||
#
|
#
|
||||||
|
|
||||||
#
|
# use the default startup lib if not set already
|
||||||
# Denote library that brings the setup sequence for C++ enviroment.
|
|
||||||
# Also add an according dependency.
|
|
||||||
#
|
|
||||||
STARTUP_LIB ?= startup
|
STARTUP_LIB ?= startup
|
||||||
PRG_LIBS += $(STARTUP_LIB)
|
PRG_LIBS += $(STARTUP_LIB)
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,23 @@
|
||||||
|
/*
|
||||||
|
* \brief Board driver for core
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _BOARD_H_
|
||||||
|
#define _BOARD_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <drivers/board_base.h>
|
||||||
|
|
||||||
|
namespace Genode { class Board : public Board_base { }; }
|
||||||
|
|
||||||
|
#endif /* _BOARD_H_ */
|
||||||
|
|
|
@ -1,95 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Board driver for core
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-11-01
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _BOARD__IMX31_H_
|
|
||||||
#define _BOARD__IMX31_H_
|
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <platform/imx31/drivers/board_base.h>
|
|
||||||
|
|
||||||
namespace Genode
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* AHB-lite 2v6 to IP bus interface
|
|
||||||
*/
|
|
||||||
class Aips : public Mmio
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* Configuration of the masters
|
|
||||||
*/
|
|
||||||
struct Mpr { enum { ALL_UNBUFFERED_AND_FULLY_TRUSTED = 0x77777777 }; };
|
|
||||||
struct Mpr1 : Register<0x0, 32>, Mpr { };
|
|
||||||
struct Mpr2 : Register<0x4, 32>, Mpr { };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Configuration of the platform peripherals
|
|
||||||
*/
|
|
||||||
struct Pacr { enum { ALL_UNBUFFERED_AND_FULLY_UNPROTECTED = 0 }; };
|
|
||||||
struct Pacr1 : Register<0x20, 32>, Pacr { };
|
|
||||||
struct Pacr2 : Register<0x24, 32>, Pacr { };
|
|
||||||
struct Pacr3 : Register<0x28, 32>, Pacr { };
|
|
||||||
struct Pacr4 : Register<0x2c, 32>, Pacr { };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Configuration of the off-platform peripherals
|
|
||||||
*/
|
|
||||||
struct Opacr1 : Register<0x40, 32>, Pacr { };
|
|
||||||
struct Opacr2 : Register<0x44, 32>, Pacr { };
|
|
||||||
struct Opacr3 : Register<0x48, 32>, Pacr { };
|
|
||||||
struct Opacr4 : Register<0x4c, 32>, Pacr { };
|
|
||||||
struct Opacr5 : Register<0x50, 32>, Pacr { };
|
|
||||||
|
|
||||||
public:
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Constructor
|
|
||||||
*/
|
|
||||||
Aips(addr_t const base) : Mmio(base) { }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Configure this module appropriately for the first kernel run
|
|
||||||
*/
|
|
||||||
void prepare_kernel()
|
|
||||||
{
|
|
||||||
/* avoid AIPS intervention at any memory access */
|
|
||||||
write<Mpr1>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
|
|
||||||
write<Mpr2>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
|
|
||||||
write<Pacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Pacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Pacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Pacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Opacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Opacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Opacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Opacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
write<Opacr5>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Board : Board_base
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* static AIPS 1 instance
|
|
||||||
*/
|
|
||||||
static Aips * aips_1() { static Aips a(AIPS_1_MMIO_BASE); return &a; }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Static AIPS 2 instance
|
|
||||||
*/
|
|
||||||
static Aips * aips_2() { static Aips a(AIPS_2_MMIO_BASE); return &a; }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Configure this module appropriately for the first kernel run
|
|
||||||
*/
|
|
||||||
static void prepare_kernel()
|
|
||||||
{
|
|
||||||
aips_1()->prepare_kernel();
|
|
||||||
aips_2()->prepare_kernel();
|
|
||||||
}
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _BOARD__IMX31_H_ */
|
|
|
@ -16,11 +16,11 @@
|
||||||
#define _CPU__ARM_V6_H_
|
#define _CPU__ARM_V6_H_
|
||||||
|
|
||||||
/* Genode includes */
|
/* Genode includes */
|
||||||
#include <board/imx31.h>
|
|
||||||
#include <base/printf.h>
|
#include <base/printf.h>
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <cpu/arm.h>
|
#include <cpu/arm.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
namespace Arm_v6
|
namespace Arm_v6
|
||||||
{
|
{
|
||||||
|
|
|
@ -14,11 +14,9 @@
|
||||||
#ifndef _CPU__ARM_V7_H_
|
#ifndef _CPU__ARM_V7_H_
|
||||||
#define _CPU__ARM_V7_H_
|
#define _CPU__ARM_V7_H_
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <cpu/arm.h>
|
#include <cpu/arm.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
namespace Arm_v7
|
namespace Arm_v7
|
||||||
{
|
{
|
||||||
|
|
|
@ -14,11 +14,9 @@
|
||||||
#ifndef _CPU__CORTEX_A9_H_
|
#ifndef _CPU__CORTEX_A9_H_
|
||||||
#define _CPU__CORTEX_A9_H_
|
#define _CPU__CORTEX_A9_H_
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <cpu/arm_v7.h>
|
#include <cpu/arm_v7.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
namespace Cortex_a9
|
namespace Cortex_a9
|
||||||
{
|
{
|
||||||
|
@ -32,17 +30,17 @@ namespace Cortex_a9
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
/* common */
|
/* common */
|
||||||
CLK = Board_base::CORTEX_A9_CLOCK, /* CPU interface clock */
|
CLK = Board::CORTEX_A9_CLOCK, /* CPU interface clock */
|
||||||
PERIPH_CLK = CLK, /* clock for CPU internal components */
|
PERIPH_CLK = CLK, /* clock for CPU internal components */
|
||||||
|
|
||||||
/* interrupt controller */
|
/* interrupt controller */
|
||||||
PL390_DISTRIBUTOR_MMIO_BASE = Board_base::CORTEX_A9_PRIVATE_MEM_BASE + 0x1000,
|
PL390_DISTRIBUTOR_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x1000,
|
||||||
PL390_DISTRIBUTOR_MMIO_SIZE = 0x1000,
|
PL390_DISTRIBUTOR_MMIO_SIZE = 0x1000,
|
||||||
PL390_CPU_MMIO_BASE = Board_base::CORTEX_A9_PRIVATE_MEM_BASE + 0x100,
|
PL390_CPU_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x100,
|
||||||
PL390_CPU_MMIO_SIZE = 0x100,
|
PL390_CPU_MMIO_SIZE = 0x100,
|
||||||
|
|
||||||
/* timer */
|
/* timer */
|
||||||
PRIVATE_TIMER_MMIO_BASE = Board_base::CORTEX_A9_PRIVATE_MEM_BASE + 0x600,
|
PRIVATE_TIMER_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x600,
|
||||||
PRIVATE_TIMER_MMIO_SIZE = 0x10,
|
PRIVATE_TIMER_MMIO_SIZE = 0x10,
|
||||||
PRIVATE_TIMER_IRQ = 29,
|
PRIVATE_TIMER_IRQ = 29,
|
||||||
PRIVATE_TIMER_CLK = PERIPH_CLK
|
PRIVATE_TIMER_CLK = PERIPH_CLK
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief CPU driver for core
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _IMX31__CPU_H_
|
||||||
|
#define _IMX31__CPU_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <cpu/arm_v6.h>
|
||||||
|
|
||||||
|
namespace Genode
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* CPU driver for core
|
||||||
|
*/
|
||||||
|
class Cpu : public Arm_v6::Cpu { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _IMX31__CPU_H_ */
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Interrupt controller for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _IMX31__PIC_H_
|
||||||
|
#define _IMX31__PIC_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <pic/imx31.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Interrupt controller for kernel
|
||||||
|
*/
|
||||||
|
class Pic : public Imx31::Pic { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _IMX31__PIC_H_ */
|
||||||
|
|
|
@ -11,12 +11,10 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <board/imx31.h>
|
|
||||||
#include <pic/imx31.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <platform.h>
|
#include <platform.h>
|
||||||
|
#include <board.h>
|
||||||
|
#include <pic.h>
|
||||||
|
|
||||||
using namespace Genode;
|
using namespace Genode;
|
||||||
|
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
#
|
#
|
||||||
# \brief Makefile for core
|
# \brief Build config for Genodes core process
|
||||||
# \author Martin Stein
|
# \author Martin Stein
|
||||||
# \date 2012-10-04
|
# \date 2012-10-04
|
||||||
#
|
#
|
||||||
|
@ -8,7 +8,36 @@
|
||||||
REQUIRES = platform_imx31
|
REQUIRES = platform_imx31
|
||||||
|
|
||||||
# add include paths
|
# add include paths
|
||||||
INC_DIR += $(REP_DIR)/src/core/include/imx31
|
INC_DIR += $(REP_DIR)/src/core/imx31
|
||||||
|
|
||||||
|
# add C++ sources
|
||||||
|
SRC_CC += platform_services.cc \
|
||||||
|
platform_support.cc \
|
||||||
|
syscall.cc
|
||||||
|
|
||||||
|
# add assembly sources
|
||||||
|
SRC_S += mode_transition.s \
|
||||||
|
boot_modules.s \
|
||||||
|
crt0.s
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath platform_services.cc $(BASE_DIR)/src/core
|
||||||
|
vpath platform_support.cc $(REP_DIR)/src/core/imx31
|
||||||
|
vpath mode_transition.s $(REP_DIR)/src/core/arm_v6
|
||||||
|
vpath syscall.cc $(REP_DIR)/src/base/arm
|
||||||
|
vpath crt0.s $(REP_DIR)/src/core/arm
|
||||||
|
|
||||||
|
#
|
||||||
|
# Check if there are other images wich shall be linked to core.
|
||||||
|
# If not use a dummy boot-modules file wich includes only the symbols.
|
||||||
|
#
|
||||||
|
ifeq ($(wildcard $(BUILD_BASE_DIR)/boot_modules.s),)
|
||||||
|
vpath boot_modules.s $(REP_DIR)/src/core/arm
|
||||||
|
else
|
||||||
|
INC_DIR += $(BUILD_BASE_DIR)
|
||||||
|
vpath boot_modules.s $(BUILD_BASE_DIR)
|
||||||
|
endif
|
||||||
|
|
||||||
# include less specific target parts
|
# include less specific target parts
|
||||||
include $(REP_DIR)/src/core/target.inc
|
include $(REP_DIR)/src/core/target.inc
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Timer for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _IMX31__TIMER_H_
|
||||||
|
#define _IMX31__TIMER_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <timer/imx31.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Kernel timer
|
||||||
|
*/
|
||||||
|
class Timer : public Imx31::Timer { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _IMX31__TIMER_H_ */
|
||||||
|
|
|
@ -1,6 +1,7 @@
|
||||||
/*
|
/*
|
||||||
* \brief Software TLB controls specific for the i.MX31
|
* \brief Translation lookaside buffer
|
||||||
* \author Norman Feske
|
* \author Norman Feske
|
||||||
|
* \author Martin stein
|
||||||
* \date 2012-08-30
|
* \date 2012-08-30
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
@ -11,48 +12,36 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _SRC__CORE__IMX31__TLB_H_
|
#ifndef _IMX31__TLB_H_
|
||||||
#define _SRC__CORE__IMX31__TLB_H_
|
#define _IMX31__TLB_H_
|
||||||
|
|
||||||
/* Genode includes */
|
/* core includes */
|
||||||
#include <tlb/arm_v6.h>
|
#include <tlb/arm_v6.h>
|
||||||
#include <board/imx31.h>
|
#include <board.h>
|
||||||
|
|
||||||
/**
|
namespace Genode
|
||||||
* Software TLB-controls
|
|
||||||
*/
|
|
||||||
class Tlb : public Arm_v6::Section_table
|
|
||||||
{
|
{
|
||||||
public:
|
struct Page_flags : Arm::Page_flags { };
|
||||||
|
|
||||||
/**
|
class Tlb : public Arm_v6::Section_table { };
|
||||||
* Placement new
|
|
||||||
*/
|
|
||||||
void * operator new (Genode::size_t, void * p) { return p; }
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Board specific mapping attributes
|
* Translation lookaside buffer of core
|
||||||
*/
|
*/
|
||||||
struct Page_flags : Arm::Page_flags { };
|
class Core_tlb : public Tlb
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
|
||||||
typedef Arm::page_flags_t page_flags_t;
|
/**
|
||||||
|
* Constructor - ensures that core never gets a pagefault
|
||||||
|
*/
|
||||||
|
Core_tlb()
|
||||||
|
{
|
||||||
|
map_core_area(Board::RAM_0_BASE, Board::RAM_0_SIZE, 0);
|
||||||
|
map_core_area(Board::MMIO_0_BASE, Board::MMIO_0_SIZE, 1);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
#endif /* _IMX31__TLB_H_ */
|
||||||
* TLB of core
|
|
||||||
*
|
|
||||||
* Must ensure that core never gets a pagefault.
|
|
||||||
*/
|
|
||||||
class Core_tlb : public Tlb
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
|
|
||||||
Core_tlb()
|
|
||||||
{
|
|
||||||
map_core_area(Genode::Board::RAM_0_BASE, Genode::Board::RAM_0_SIZE, 0);
|
|
||||||
map_core_area(Genode::Board::MMIO_0_BASE, Genode::Board::MMIO_0_SIZE, 1);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__IMX31__TLB_H_ */
|
|
||||||
|
|
||||||
|
|
|
@ -1,41 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Parts of kernel support that are identical for all Cortex A9 systems
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-04-23
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _CORE__INCLUDE__CORTEX_A9__KERNEL_SUPPORT_H_
|
|
||||||
#define _CORE__INCLUDE__CORTEX_A9__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* core includes */
|
|
||||||
#include <cpu/cortex_a9.h>
|
|
||||||
#include <timer/cortex_a9.h>
|
|
||||||
#include <pic/cortex_a9_no_trustzone.h>
|
|
||||||
|
|
||||||
/**
|
|
||||||
* CPU driver
|
|
||||||
*/
|
|
||||||
class Cpu : public Cortex_a9::Cpu { };
|
|
||||||
|
|
||||||
namespace Kernel
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* Programmable interrupt controller
|
|
||||||
*/
|
|
||||||
class Pic : public Cortex_a9_no_trustzone::Pic { };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Kernel timer
|
|
||||||
*/
|
|
||||||
class Timer : public Cortex_a9::Timer { };
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _CORE__INCLUDE__CORTEX_A9__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -1,39 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Kernel support for i.MX31
|
|
||||||
* \author Norman Feske
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-08-30
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _CORE__INCLUDE__IMX31__KERNEL_SUPPORT_H_
|
|
||||||
#define _CORE__INCLUDE__IMX31__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <cpu/arm_v6.h>
|
|
||||||
#include <timer/imx31.h>
|
|
||||||
#include <pic/imx31.h>
|
|
||||||
|
|
||||||
struct Cpu : Arm_v6::Cpu { };
|
|
||||||
|
|
||||||
namespace Kernel
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* Programmable interrupt controller
|
|
||||||
*/
|
|
||||||
class Pic : public Imx31::Pic { };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Timer
|
|
||||||
*/
|
|
||||||
class Timer : public Imx31::Timer { };
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _CORE__INCLUDE__IMX31__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -1,176 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Core timer
|
|
||||||
* \author Martin Stein
|
|
||||||
* \author Norman Feske
|
|
||||||
* \date 2012-08-30
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _INCLUDE__IMX31__TIMER_H_
|
|
||||||
#define _INCLUDE__IMX31__TIMER_H_
|
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <util/mmio.h>
|
|
||||||
|
|
||||||
namespace Imx31
|
|
||||||
{
|
|
||||||
using namespace Genode;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Core timer
|
|
||||||
*/
|
|
||||||
class Timer : public Mmio
|
|
||||||
{
|
|
||||||
enum { TICS_PER_MS = 32 };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Control register
|
|
||||||
*/
|
|
||||||
struct Cr : Register<0x0, 32>
|
|
||||||
{
|
|
||||||
struct En : Bitfield<0, 1> { }; /* enable timer */
|
|
||||||
|
|
||||||
struct En_mod : Bitfield<1, 1> /* reload or continue on enable */
|
|
||||||
{
|
|
||||||
enum { RELOAD = 1 };
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Oci_en : Bitfield<2, 1> { }; /* interrupt on compare */
|
|
||||||
|
|
||||||
struct Rld : Bitfield<3, 1> /* reload or roll-over */
|
|
||||||
{
|
|
||||||
enum { RELOAD_FROM_LR = 1 };
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Prescaler : Bitfield<4, 12> /* clock input divisor */
|
|
||||||
{
|
|
||||||
enum { DIVIDE_BY_1 = 0 };
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Swr : Bitfield<16, 1> { }; /* software reset bit */
|
|
||||||
struct Iovw : Bitfield<17, 1> { }; /* enable overwrite */
|
|
||||||
struct Dbg_en : Bitfield<18, 1> { }; /* enable in debug mode */
|
|
||||||
struct Wait_en : Bitfield<19, 1> { }; /* enable in wait mode */
|
|
||||||
struct Doz_en : Bitfield<20, 1> { }; /* enable in doze mode */
|
|
||||||
struct Stop_en : Bitfield<21, 1> { }; /* enable in stop mode */
|
|
||||||
|
|
||||||
struct Om : Bitfield<22, 2> /* mode of the output pin */
|
|
||||||
{
|
|
||||||
enum { DISCONNECTED = 0 };
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Clk_src : Bitfield<24, 2> /* select clock input */
|
|
||||||
{
|
|
||||||
enum { IPG_CLK_32K = 3 };
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Register value that configures the timer for a one-shot run
|
|
||||||
*/
|
|
||||||
static access_t prepare_one_shot()
|
|
||||||
{
|
|
||||||
return En::bits(0) |
|
|
||||||
En_mod::bits(En_mod::RELOAD) |
|
|
||||||
Oci_en::bits(1) |
|
|
||||||
Rld::bits(Rld::RELOAD_FROM_LR) |
|
|
||||||
Prescaler::bits(Prescaler::DIVIDE_BY_1) |
|
|
||||||
Swr::bits(0) |
|
|
||||||
Iovw::bits(0) |
|
|
||||||
Dbg_en::bits(0) |
|
|
||||||
Wait_en::bits(0) |
|
|
||||||
Doz_en::bits(0) |
|
|
||||||
Stop_en::bits(0) |
|
|
||||||
Om::bits(Om::DISCONNECTED) |
|
|
||||||
Clk_src::bits(Clk_src::IPG_CLK_32K);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Status register
|
|
||||||
*/
|
|
||||||
struct Sr : Register<0x4, 32>
|
|
||||||
{
|
|
||||||
struct Ocif : Bitfield<0, 1> { }; /* IRQ status, write 1 clears */
|
|
||||||
};
|
|
||||||
|
|
||||||
struct Lr : Register<0x8, 32> { }; /* load value register */
|
|
||||||
struct Cmpr : Register<0xc, 32> { }; /* compare value register */
|
|
||||||
struct Cnt : Register<0x10, 32> { }; /* counter register */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Disable timer and clear its interrupt output
|
|
||||||
*/
|
|
||||||
void _reset()
|
|
||||||
{
|
|
||||||
/* wait until ongoing reset operations are finished */
|
|
||||||
while (read<Cr::Swr>()) ;
|
|
||||||
|
|
||||||
/* disable timer */
|
|
||||||
write<Cr::En>(0);
|
|
||||||
clear_interrupt();
|
|
||||||
}
|
|
||||||
|
|
||||||
public:
|
|
||||||
|
|
||||||
enum { IRQ = Board::EPIT_1_IRQ };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Constructor
|
|
||||||
*/
|
|
||||||
Timer() : Mmio(Board::EPIT_1_MMIO_BASE) { _reset(); }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Start a one-shot run
|
|
||||||
*
|
|
||||||
* \param tics native timer value used to assess the delay
|
|
||||||
* of the timer interrupt as of the call
|
|
||||||
*/
|
|
||||||
void start_one_shot(unsigned const tics)
|
|
||||||
{
|
|
||||||
/* stop timer */
|
|
||||||
_reset();
|
|
||||||
|
|
||||||
/* configure timer for a one-shot */
|
|
||||||
write<Cr>(Cr::prepare_one_shot());
|
|
||||||
write<Lr>(tics);
|
|
||||||
write<Cmpr>(0);
|
|
||||||
|
|
||||||
/* start timer */
|
|
||||||
write<Cr::En>(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Stop the timer from a one-shot run
|
|
||||||
*
|
|
||||||
* \return last native timer value of the one-shot run
|
|
||||||
*/
|
|
||||||
unsigned long stop_one_shot()
|
|
||||||
{
|
|
||||||
/* disable timer */
|
|
||||||
write<Cr::En>(0);
|
|
||||||
|
|
||||||
/* if the timer has hit zero already return 0 */
|
|
||||||
return read<Sr::Ocif>() ? 0 : read<Cnt>();
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Clear interrupt output line
|
|
||||||
*/
|
|
||||||
void clear_interrupt() { write<Sr::Ocif>(1); }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Translate milliseconds to a native timer value
|
|
||||||
*/
|
|
||||||
static unsigned ms_to_tics(unsigned const ms) {
|
|
||||||
return TICS_PER_MS * ms; }
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _INCLUDE__IMX31__TIMER_H_ */
|
|
||||||
|
|
|
@ -293,7 +293,7 @@ namespace Kernel
|
||||||
Pd(Tlb * const t) : _tlb(t)
|
Pd(Tlb * const t) : _tlb(t)
|
||||||
{
|
{
|
||||||
/* try to add translation for mode transition region */
|
/* try to add translation for mode transition region */
|
||||||
page_flags_t const flags = Page_flags::mode_transition();
|
Page_flags::access_t const flags = Page_flags::mode_transition();
|
||||||
unsigned const slog2 =
|
unsigned const slog2 =
|
||||||
tlb()->insert_translation(mtc()->VIRT_BASE,
|
tlb()->insert_translation(mtc()->VIRT_BASE,
|
||||||
mtc()->phys_base(),
|
mtc()->phys_base(),
|
||||||
|
|
|
@ -19,7 +19,10 @@
|
||||||
#include <util/avl_tree.h>
|
#include <util/avl_tree.h>
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <kernel_support.h>
|
#include <cpu.h>
|
||||||
|
#include <tlb.h>
|
||||||
|
#include <pic.h>
|
||||||
|
#include <timer.h>
|
||||||
#include <assert.h>
|
#include <assert.h>
|
||||||
|
|
||||||
namespace Genode
|
namespace Genode
|
||||||
|
@ -29,6 +32,10 @@ namespace Genode
|
||||||
|
|
||||||
namespace Kernel
|
namespace Kernel
|
||||||
{
|
{
|
||||||
|
typedef Genode::Cpu Cpu;
|
||||||
|
typedef Genode::Tlb Tlb;
|
||||||
|
typedef Genode::Page_flags Page_flags;
|
||||||
|
typedef Genode::Core_tlb Core_tlb;
|
||||||
typedef Genode::addr_t addr_t;
|
typedef Genode::addr_t addr_t;
|
||||||
typedef Genode::size_t size_t;
|
typedef Genode::size_t size_t;
|
||||||
typedef Genode::Signal Signal;
|
typedef Genode::Signal Signal;
|
||||||
|
|
|
@ -12,7 +12,9 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <kernel_support.h>
|
#include <cpu.h>
|
||||||
|
|
||||||
|
using namespace Genode;
|
||||||
|
|
||||||
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
|
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief CPU driver for core
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PANDA__CPU_H_
|
||||||
|
#define _PANDA__CPU_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <cpu/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Genode
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* CPU driver for core
|
||||||
|
*/
|
||||||
|
class Cpu : public Cortex_a9::Cpu { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PANDA__CPU_H_ */
|
||||||
|
|
|
@ -1,21 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Kernel support specific for the PandaBoard A2
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-04-23
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _SRC__CORE__PANDA_A2__KERNEL_SUPPORT_H_
|
|
||||||
#define _SRC__CORE__PANDA_A2__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* local includes */
|
|
||||||
#include <cortex_a9/kernel_support.h>
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__PANDA_A2__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Interrupt controller for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PANDA__PIC_H_
|
||||||
|
#define _PANDA__PIC_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <pic/cortex_a9_no_trustzone.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Interrupt controller for kernel
|
||||||
|
*/
|
||||||
|
class Pic : public Cortex_a9_no_trustzone::Pic { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PANDA__PIC_H_ */
|
||||||
|
|
|
@ -11,13 +11,11 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <cpu/cortex_a9.h>
|
#include <cpu/cortex_a9.h>
|
||||||
#include <pic/cortex_a9_no_trustzone.h>
|
#include <pic/cortex_a9_no_trustzone.h>
|
||||||
#include <platform.h>
|
#include <platform.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
using namespace Genode;
|
using namespace Genode;
|
||||||
|
|
||||||
|
@ -26,7 +24,7 @@ Native_region * Platform::_ram_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE }
|
{ Board::RAM_0_BASE, Board::RAM_0_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -50,7 +48,7 @@ Native_region * Platform::_core_only_irq_regions(unsigned const i)
|
||||||
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
||||||
|
|
||||||
/* core UART */
|
/* core UART */
|
||||||
{ Board_base::TL16C750_3_IRQ, 1 }
|
{ Board::TL16C750_3_IRQ, 1 }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -60,11 +58,11 @@ Native_region * Platform::_mmio_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE },
|
{ Board::MMIO_0_BASE, Board::MMIO_0_SIZE },
|
||||||
{ Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE },
|
{ Board::MMIO_1_BASE, Board::MMIO_1_SIZE },
|
||||||
{ Board_base::DSS_MMIO_BASE, Board_base::DSS_MMIO_SIZE },
|
{ Board::DSS_MMIO_BASE, Board::DSS_MMIO_SIZE },
|
||||||
{ Board_base::DISPC_MMIO_BASE, Board_base::DISPC_MMIO_SIZE },
|
{ Board::DISPC_MMIO_BASE, Board::DISPC_MMIO_SIZE },
|
||||||
{ Board_base::HDMI_MMIO_BASE, Board_base::HDMI_MMIO_SIZE }
|
{ Board::HDMI_MMIO_BASE, Board::HDMI_MMIO_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -75,11 +73,11 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
/* core timer and PIC */
|
/* core timer and PIC */
|
||||||
{ Board_base::CORTEX_A9_PRIVATE_MEM_BASE,
|
{ Board::CORTEX_A9_PRIVATE_MEM_BASE,
|
||||||
Board_base::CORTEX_A9_PRIVATE_MEM_SIZE },
|
Board::CORTEX_A9_PRIVATE_MEM_SIZE },
|
||||||
|
|
||||||
/* core UART */
|
/* core UART */
|
||||||
{ Board_base::TL16C750_3_MMIO_BASE, Board_base::TL16C750_MMIO_SIZE }
|
{ Board::TL16C750_3_MMIO_BASE, Board::TL16C750_MMIO_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,12 +1,44 @@
|
||||||
#
|
#
|
||||||
# \brief Makefile for core
|
# \brief Build config for Genodes core process
|
||||||
# \author Stefan Kalkowski
|
# \author Stefan Kalkowski
|
||||||
|
# \author Martin Stein
|
||||||
# \date 2012-10-04
|
# \date 2012-10-04
|
||||||
#
|
#
|
||||||
|
|
||||||
# declare wich specs must be given to build this target
|
# declare wich specs must be given to build this target
|
||||||
REQUIRES += platform_panda
|
REQUIRES += platform_panda
|
||||||
|
|
||||||
|
# add include paths
|
||||||
|
INC_DIR += $(REP_DIR)/src/core/panda
|
||||||
|
|
||||||
|
# add C++ sources
|
||||||
|
SRC_CC += platform_services.cc \
|
||||||
|
platform_support.cc \
|
||||||
|
syscall.cc
|
||||||
|
|
||||||
|
# add assembly sources
|
||||||
|
SRC_S += mode_transition.s \
|
||||||
|
boot_modules.s \
|
||||||
|
crt0.s
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath platform_support.cc $(REP_DIR)/src/core/panda
|
||||||
|
vpath platform_services.cc $(BASE_DIR)/src/core
|
||||||
|
vpath mode_transition.s $(REP_DIR)/src/core/arm_v7
|
||||||
|
vpath syscall.cc $(REP_DIR)/src/base/arm
|
||||||
|
vpath crt0.s $(REP_DIR)/src/core/arm
|
||||||
|
|
||||||
|
#
|
||||||
|
# Check if there are other images wich shall be linked to core.
|
||||||
|
# If not use a dummy boot-modules file wich includes only the symbols.
|
||||||
|
#
|
||||||
|
ifeq ($(wildcard $(BUILD_BASE_DIR)/boot_modules.s),)
|
||||||
|
vpath boot_modules.s $(REP_DIR)/src/core/arm
|
||||||
|
else
|
||||||
|
INC_DIR += $(BUILD_BASE_DIR)
|
||||||
|
vpath boot_modules.s $(BUILD_BASE_DIR)
|
||||||
|
endif
|
||||||
|
|
||||||
# include less specific target parts
|
# include less specific target parts
|
||||||
include $(REP_DIR)/src/core/target.inc
|
include $(REP_DIR)/src/core/target.inc
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Timer for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PANDA__TIMER_H_
|
||||||
|
#define _PANDA__TIMER_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <timer/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Kernel timer
|
||||||
|
*/
|
||||||
|
class Timer : public Cortex_a9::Timer { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PANDA__TIMER_H_ */
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* \brief Software TLB controls specific for the PandaBoard A2
|
* \brief Transtaltion lookaside buffer
|
||||||
* \author Martin Stein
|
* \author Martin Stein
|
||||||
* \date 2012-04-23
|
* \date 2012-04-23
|
||||||
*/
|
*/
|
||||||
|
@ -11,52 +11,38 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _SRC__CORE__PANDA_A2__TLB_H_
|
#ifndef _PANDA__TLB_H_
|
||||||
#define _SRC__CORE__PANDA_A2__TLB_H_
|
#define _PANDA__TLB_H_
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
|
#include <board.h>
|
||||||
#include <tlb/arm_v7.h>
|
#include <tlb/arm_v7.h>
|
||||||
|
|
||||||
/**
|
namespace Genode
|
||||||
* Software TLB-controls
|
|
||||||
*/
|
|
||||||
class Tlb : public Arm_v7::Section_table
|
|
||||||
{
|
{
|
||||||
public:
|
struct Page_flags : Arm::Page_flags { };
|
||||||
|
|
||||||
/**
|
class Tlb : public Arm_v7::Section_table { };
|
||||||
* Placement new
|
|
||||||
*/
|
|
||||||
void * operator new (Genode::size_t, void * p) { return p; }
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Board specific mapping attributes
|
* Transtaltion lookaside buffer of core
|
||||||
*/
|
*/
|
||||||
struct Page_flags : Arm::Page_flags { };
|
class Core_tlb : public Tlb
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
|
||||||
typedef Arm::page_flags_t page_flags_t;
|
/**
|
||||||
|
* Constructor - ensures that core never gets a pagefault
|
||||||
|
*/
|
||||||
|
Core_tlb()
|
||||||
|
{
|
||||||
|
using namespace Genode;
|
||||||
|
map_core_area(Board::RAM_0_BASE, Board::RAM_0_SIZE, 0);
|
||||||
|
map_core_area(Board::MMIO_0_BASE, Board::MMIO_0_SIZE, 1);
|
||||||
|
map_core_area(Board::MMIO_1_BASE, Board::MMIO_1_SIZE, 1);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
#endif /* _PANDA__TLB_H_ */
|
||||||
* TLB of core
|
|
||||||
*
|
|
||||||
* Must ensure that core never gets a pagefault.
|
|
||||||
*/
|
|
||||||
class Core_tlb : public Tlb
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
|
|
||||||
Core_tlb()
|
|
||||||
{
|
|
||||||
using namespace Genode;
|
|
||||||
map_core_area(Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE, 0);
|
|
||||||
map_core_area(Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE, 1);
|
|
||||||
map_core_area(Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE, 1);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__PANDA_A2__TLB_H_ */
|
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief CPU driver for core
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PBXA9__CPU_H_
|
||||||
|
#define _PBXA9__CPU_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <cpu/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Genode
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* CPU driver for core
|
||||||
|
*/
|
||||||
|
class Cpu : public Cortex_a9::Cpu { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PBXA9__CPU_H_ */
|
||||||
|
|
|
@ -1,21 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Kernel support specific for the Realview PBXA9
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-04-23
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _SRC__CORE__PBXA9__KERNEL_SUPPORT_H_
|
|
||||||
#define _SRC__CORE__PBXA9__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* local includes */
|
|
||||||
#include <cortex_a9/kernel_support.h>
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__PBXA9__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Interrupt controller for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PBXA9__PIC_H_
|
||||||
|
#define _PBXA9__PIC_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <pic/cortex_a9_no_trustzone.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Interrupt controller for kernel
|
||||||
|
*/
|
||||||
|
class Pic : public Cortex_a9_no_trustzone::Pic { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PBXA9__PIC_H_ */
|
||||||
|
|
|
@ -11,10 +11,8 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
|
#include <board.h>
|
||||||
#include <platform.h>
|
#include <platform.h>
|
||||||
#include <cpu/cortex_a9.h>
|
#include <cpu/cortex_a9.h>
|
||||||
#include <pic/cortex_a9_no_trustzone.h>
|
#include <pic/cortex_a9_no_trustzone.h>
|
||||||
|
@ -27,8 +25,8 @@ Native_region * Platform::_ram_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE },
|
{ Board::RAM_0_BASE, Board::RAM_0_SIZE },
|
||||||
{ Board_base::RAM_1_BASE, Board_base::RAM_1_SIZE }
|
{ Board::RAM_1_BASE, Board::RAM_1_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -52,7 +50,7 @@ Native_region * Platform::_core_only_irq_regions(unsigned const i)
|
||||||
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
||||||
|
|
||||||
/* core UART */
|
/* core UART */
|
||||||
{ Board_base::PL011_0_IRQ, 1 }
|
{ Board::PL011_0_IRQ, 1 }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -62,8 +60,8 @@ Native_region * Platform::_mmio_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE },
|
{ Board::MMIO_0_BASE, Board::MMIO_0_SIZE },
|
||||||
{ Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE }
|
{ Board::MMIO_1_BASE, Board::MMIO_1_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -74,10 +72,10 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
/* core timer and PIC */
|
/* core timer and PIC */
|
||||||
{ Board_base::CORTEX_A9_PRIVATE_MEM_BASE, Board_base::CORTEX_A9_PRIVATE_MEM_SIZE },
|
{ Board::CORTEX_A9_PRIVATE_MEM_BASE, Board::CORTEX_A9_PRIVATE_MEM_SIZE },
|
||||||
|
|
||||||
/* core UART */
|
/* core UART */
|
||||||
{ Board_base::PL011_0_MMIO_BASE, Board_base::PL011_0_MMIO_SIZE }
|
{ Board::PL011_0_MMIO_BASE, Board::PL011_0_MMIO_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,11 +1,43 @@
|
||||||
#
|
#
|
||||||
# \brief Makefile for core
|
# \brief Build config for Genodes core process
|
||||||
# \author Stefan Kalkowski
|
# \author Stefan Kalkowski
|
||||||
|
# \author Martin Stein
|
||||||
# \date 2012-10-04
|
# \date 2012-10-04
|
||||||
#
|
#
|
||||||
|
|
||||||
# declare wich specs must be given to build this target
|
# declare wich specs must be given to build this target
|
||||||
REQUIRES = platform_pbxa9
|
REQUIRES += platform_pbxa9
|
||||||
|
|
||||||
|
# add include paths
|
||||||
|
INC_DIR += $(REP_DIR)/src/core/pbxa9
|
||||||
|
|
||||||
|
# add C++ sources
|
||||||
|
SRC_CC += platform_services.cc \
|
||||||
|
platform_support.cc \
|
||||||
|
syscall.cc
|
||||||
|
|
||||||
|
# add assembly sources
|
||||||
|
SRC_S += mode_transition.s \
|
||||||
|
boot_modules.s \
|
||||||
|
crt0.s
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath platform_services.cc $(BASE_DIR)/src/core
|
||||||
|
vpath platform_support.cc $(REP_DIR)/src/core/pbxa9
|
||||||
|
vpath mode_transition.s $(REP_DIR)/src/core/arm_v7
|
||||||
|
vpath syscall.cc $(REP_DIR)/src/base/arm
|
||||||
|
vpath crt0.s $(REP_DIR)/src/core/arm
|
||||||
|
|
||||||
|
#
|
||||||
|
# Check if there are other images wich shall be linked to core.
|
||||||
|
# If not use a dummy boot-modules file wich includes only the symbols.
|
||||||
|
#
|
||||||
|
ifeq ($(wildcard $(BUILD_BASE_DIR)/boot_modules.s),)
|
||||||
|
vpath boot_modules.s $(REP_DIR)/src/core/arm
|
||||||
|
else
|
||||||
|
INC_DIR += $(BUILD_BASE_DIR)
|
||||||
|
vpath boot_modules.s $(BUILD_BASE_DIR)
|
||||||
|
endif
|
||||||
|
|
||||||
# include less specific target parts
|
# include less specific target parts
|
||||||
include $(REP_DIR)/src/core/target.inc
|
include $(REP_DIR)/src/core/target.inc
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Timer for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PBXA9__TIMER_H_
|
||||||
|
#define _PBXA9__TIMER_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <timer/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Kernel timer
|
||||||
|
*/
|
||||||
|
class Timer : public Cortex_a9::Timer { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _PBXA9__TIMER_H_ */
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* \brief Software TLB controls specific for the Realview PBXA9
|
* \brief Translation lookaside buffer
|
||||||
* \author Martin Stein
|
* \author Martin Stein
|
||||||
* \date 2012-04-23
|
* \date 2012-04-23
|
||||||
*/
|
*/
|
||||||
|
@ -11,53 +11,39 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _SRC__CORE__PBXA9__TLB_H_
|
#ifndef _PBXA9__TLB_H_
|
||||||
#define _SRC__CORE__PBXA9__TLB_H_
|
#define _PBXA9__TLB_H_
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
|
#include <board.h>
|
||||||
#include <tlb/arm_v7.h>
|
#include <tlb/arm_v7.h>
|
||||||
|
|
||||||
/**
|
namespace Genode
|
||||||
* Software TLB-controls
|
|
||||||
*/
|
|
||||||
class Tlb : public Arm_v7::Section_table
|
|
||||||
{
|
{
|
||||||
public:
|
struct Page_flags : Arm::Page_flags { };
|
||||||
|
|
||||||
/**
|
class Tlb : public Arm_v7::Section_table { };
|
||||||
* Placement new
|
|
||||||
*/
|
|
||||||
void * operator new (Genode::size_t, void * p) { return p; }
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Board specific mapping attributes
|
* Translation lookaside buffer of core
|
||||||
*/
|
*/
|
||||||
struct Page_flags : Arm::Page_flags { };
|
class Core_tlb : public Tlb
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
|
||||||
typedef Arm::page_flags_t page_flags_t;
|
/**
|
||||||
|
* Constructor - ensures that core never gets a pagefault
|
||||||
|
*/
|
||||||
|
Core_tlb()
|
||||||
|
{
|
||||||
|
using namespace Genode;
|
||||||
|
map_core_area(Board::RAM_0_BASE, Board::RAM_0_SIZE, 0);
|
||||||
|
map_core_area(Board::RAM_1_BASE, Board::RAM_1_SIZE, 0);
|
||||||
|
map_core_area(Board::MMIO_0_BASE, Board::MMIO_0_SIZE, 1);
|
||||||
|
map_core_area(Board::MMIO_1_BASE, Board::MMIO_1_SIZE, 1);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
#endif /* _PBXA9__TLB_H_ */
|
||||||
* TLB of core
|
|
||||||
*
|
|
||||||
* Must ensure that core never gets a pagefault.
|
|
||||||
*/
|
|
||||||
class Core_tlb : public Tlb
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
|
|
||||||
Core_tlb()
|
|
||||||
{
|
|
||||||
using namespace Genode;
|
|
||||||
map_core_area(Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE, 0);
|
|
||||||
map_core_area(Board_base::RAM_1_BASE, Board_base::RAM_1_SIZE, 0);
|
|
||||||
map_core_area(Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE, 1);
|
|
||||||
map_core_area(Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE, 1);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__PBXA9__TLB_H_ */
|
|
||||||
|
|
||||||
|
|
|
@ -19,7 +19,7 @@
|
||||||
#include <util/mmio.h>
|
#include <util/mmio.h>
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
#include <imx31/board.h>
|
#include <board.h>
|
||||||
|
|
||||||
namespace Imx31
|
namespace Imx31
|
||||||
{
|
{
|
||||||
|
|
|
@ -59,7 +59,7 @@ void Ipc_pager::resolve_and_wait_for_fault()
|
||||||
|
|
||||||
/* prepare mapping */
|
/* prepare mapping */
|
||||||
Tlb * const tlb = _pagefault.tlb;
|
Tlb * const tlb = _pagefault.tlb;
|
||||||
page_flags_t const flags =
|
Page_flags::access_t const flags =
|
||||||
Page_flags::resolve_and_wait_for_fault(_mapping.writable,
|
Page_flags::resolve_and_wait_for_fault(_mapping.writable,
|
||||||
_mapping.write_combined,
|
_mapping.write_combined,
|
||||||
_mapping.io_mem);
|
_mapping.io_mem);
|
||||||
|
|
|
@ -7,21 +7,33 @@
|
||||||
# set program name
|
# set program name
|
||||||
TARGET = core
|
TARGET = core
|
||||||
|
|
||||||
# use core specific startup library
|
# set entry point of core's first thread
|
||||||
STARTUP_LIB = core_support
|
CC_OPT += -DCORE_MAIN=_main
|
||||||
|
|
||||||
|
# core brings its own startup code
|
||||||
|
STARTUP_LIB =
|
||||||
|
|
||||||
# add library dependencies
|
# add library dependencies
|
||||||
LIBS += cxx raw_ipc heap child process pager lock console signal raw_server \
|
LIBS += cxx \
|
||||||
syscall core_support
|
raw_ipc \
|
||||||
|
heap \
|
||||||
|
child \
|
||||||
|
process \
|
||||||
|
pager \
|
||||||
|
lock \
|
||||||
|
console \
|
||||||
|
signal \
|
||||||
|
raw_server \
|
||||||
|
syscall
|
||||||
|
|
||||||
# add include paths
|
# add include paths
|
||||||
GEN_CORE_DIR = $(BASE_DIR)/src/core
|
INC_DIR += $(REP_DIR)/src/core \
|
||||||
INC_DIR += $(PRG_DIR) \
|
$(REP_DIR)/src/core/include \
|
||||||
$(REP_DIR)/src/core \
|
$(REP_DIR)/include \
|
||||||
$(REP_DIR)/src/core/include $(REP_DIR)/include \
|
$(REP_DIR)/src/platform \
|
||||||
$(REP_DIR)/src/platform $(GEN_CORE_DIR)/include \
|
$(BASE_DIR)/src/core/include \
|
||||||
$(BASE_DIR)/src/platform $(BASE_DIR)/src/core/include \
|
$(BASE_DIR)/include \
|
||||||
$(BASE_DIR)/include
|
$(BASE_DIR)/src/platform
|
||||||
|
|
||||||
# add C++ sources
|
# add C++ sources
|
||||||
SRC_CC += _main.cc \
|
SRC_CC += _main.cc \
|
||||||
|
@ -43,20 +55,24 @@ SRC_CC += _main.cc \
|
||||||
rm_session_component.cc \
|
rm_session_component.cc \
|
||||||
rom_session_component.cc \
|
rom_session_component.cc \
|
||||||
signal_session_component.cc \
|
signal_session_component.cc \
|
||||||
thread.cc
|
thread.cc \
|
||||||
|
kernel.cc \
|
||||||
|
rm_session_support.cc \
|
||||||
|
kernel_support.cc \
|
||||||
|
trustzone.cc
|
||||||
|
|
||||||
# declare file locations
|
# declare file locations
|
||||||
vpath _main.cc $(BASE_DIR)/src/platform
|
vpath _main.cc $(BASE_DIR)/src/platform
|
||||||
vpath cpu_session_component.cc $(GEN_CORE_DIR)
|
vpath cpu_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath dataspace_component.cc $(GEN_CORE_DIR)
|
vpath dataspace_component.cc $(BASE_DIR)/src/core
|
||||||
vpath io_mem_session_component.cc $(GEN_CORE_DIR)
|
vpath io_mem_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath io_mem_session_support.cc $(GEN_CORE_DIR)
|
vpath io_mem_session_support.cc $(BASE_DIR)/src/core
|
||||||
vpath main.cc $(GEN_CORE_DIR)
|
vpath main.cc $(BASE_DIR)/src/core
|
||||||
vpath pd_session_component.cc $(GEN_CORE_DIR)
|
vpath pd_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath ram_session_component.cc $(GEN_CORE_DIR)
|
vpath ram_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath rm_session_component.cc $(GEN_CORE_DIR)
|
vpath rm_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath rom_session_component.cc $(GEN_CORE_DIR)
|
vpath rom_session_component.cc $(BASE_DIR)/src/core
|
||||||
vpath dump_alloc.cc $(GEN_CORE_DIR)
|
vpath dump_alloc.cc $(BASE_DIR)/src/core
|
||||||
vpath console.cc $(REP_DIR)/src/base
|
vpath console.cc $(REP_DIR)/src/base
|
||||||
vpath % $(REP_DIR)/src/core
|
vpath % $(REP_DIR)/src/core
|
||||||
|
|
||||||
|
|
|
@ -59,8 +59,6 @@ namespace Arm
|
||||||
D::bits(0) | C::bits(1); }
|
D::bits(0) | C::bits(1); }
|
||||||
};
|
};
|
||||||
|
|
||||||
typedef Page_flags::access_t page_flags_t;
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Check if 'p' is aligned to 1 << 'alignm_log2'
|
* Check if 'p' is aligned to 1 << 'alignm_log2'
|
||||||
*/
|
*/
|
||||||
|
@ -105,7 +103,7 @@ namespace Arm
|
||||||
*/
|
*/
|
||||||
template <typename T>
|
template <typename T>
|
||||||
static typename T::access_t
|
static typename T::access_t
|
||||||
access_permission_bits(page_flags_t const flags)
|
access_permission_bits(Page_flags::access_t const flags)
|
||||||
{
|
{
|
||||||
/* lookup table for AP bitfield values according to 'w' and 'k' flag */
|
/* lookup table for AP bitfield values according to 'w' and 'k' flag */
|
||||||
typedef typename T::Ap_1_0 Ap_1_0;
|
typedef typename T::Ap_1_0 Ap_1_0;
|
||||||
|
@ -141,7 +139,8 @@ namespace Arm
|
||||||
* Memory region attributes for the translation descriptor 'T'
|
* Memory region attributes for the translation descriptor 'T'
|
||||||
*/
|
*/
|
||||||
template <typename T>
|
template <typename T>
|
||||||
static typename T::access_t memory_region_attr(page_flags_t const flags)
|
static typename T::access_t
|
||||||
|
memory_region_attr(Page_flags::access_t const flags)
|
||||||
{
|
{
|
||||||
typedef typename T::Tex Tex;
|
typedef typename T::Tex Tex;
|
||||||
typedef typename T::C C;
|
typedef typename T::C C;
|
||||||
|
@ -294,7 +293,7 @@ namespace Arm
|
||||||
/**
|
/**
|
||||||
* Compose descriptor value
|
* Compose descriptor value
|
||||||
*/
|
*/
|
||||||
static access_t create(page_flags_t const flags,
|
static access_t create(Page_flags::access_t const flags,
|
||||||
addr_t const pa)
|
addr_t const pa)
|
||||||
{
|
{
|
||||||
access_t v = access_permission_bits<Small_page>(flags) |
|
access_t v = access_permission_bits<Small_page>(flags) |
|
||||||
|
@ -381,7 +380,7 @@ namespace Arm
|
||||||
*/
|
*/
|
||||||
void insert_translation(addr_t const vo, addr_t const pa,
|
void insert_translation(addr_t const vo, addr_t const pa,
|
||||||
unsigned long const size_log2,
|
unsigned long const size_log2,
|
||||||
page_flags_t const flags)
|
Page_flags::access_t const flags)
|
||||||
{
|
{
|
||||||
/* validate virtual address */
|
/* validate virtual address */
|
||||||
unsigned long i;
|
unsigned long i;
|
||||||
|
@ -645,7 +644,7 @@ namespace Arm
|
||||||
/**
|
/**
|
||||||
* Compose descriptor value
|
* Compose descriptor value
|
||||||
*/
|
*/
|
||||||
static access_t create(page_flags_t const flags,
|
static access_t create(Page_flags::access_t const flags,
|
||||||
addr_t const pa)
|
addr_t const pa)
|
||||||
{
|
{
|
||||||
access_t v = access_permission_bits<Section>(flags) |
|
access_t v = access_permission_bits<Section>(flags) |
|
||||||
|
@ -685,6 +684,11 @@ namespace Arm
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Placement new
|
||||||
|
*/
|
||||||
|
void * operator new (size_t, void * p) { return p; }
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Constructor
|
* Constructor
|
||||||
*/
|
*/
|
||||||
|
@ -745,7 +749,7 @@ namespace Arm
|
||||||
template <typename ST>
|
template <typename ST>
|
||||||
unsigned long insert_translation(addr_t const vo, addr_t const pa,
|
unsigned long insert_translation(addr_t const vo, addr_t const pa,
|
||||||
unsigned long const size_log2,
|
unsigned long const size_log2,
|
||||||
page_flags_t const flags,
|
Page_flags::access_t const flags,
|
||||||
ST * const st,
|
ST * const st,
|
||||||
void * const extra_space = 0)
|
void * const extra_space = 0)
|
||||||
{
|
{
|
||||||
|
@ -938,7 +942,8 @@ namespace Arm
|
||||||
void map_core_area(addr_t vo, size_t s, bool io_mem, ST * st)
|
void map_core_area(addr_t vo, size_t s, bool io_mem, ST * st)
|
||||||
{
|
{
|
||||||
/* initialize parameters */
|
/* initialize parameters */
|
||||||
page_flags_t const flags = Page_flags::map_core_area(io_mem);
|
Page_flags::access_t const flags =
|
||||||
|
Page_flags::map_core_area(io_mem);
|
||||||
unsigned tsl2 = translation_size_l2(vo, s);
|
unsigned tsl2 = translation_size_l2(vo, s);
|
||||||
size_t ts = 1 << tsl2;
|
size_t ts = 1 << tsl2;
|
||||||
|
|
||||||
|
|
|
@ -53,7 +53,7 @@ namespace Arm_v6
|
||||||
/**
|
/**
|
||||||
* Compose descriptor value
|
* Compose descriptor value
|
||||||
*/
|
*/
|
||||||
static access_t create(Arm::page_flags_t const flags,
|
static access_t create(Arm::Page_flags::access_t const flags,
|
||||||
addr_t const pa, Section_table *)
|
addr_t const pa, Section_table *)
|
||||||
{
|
{
|
||||||
return Arm::Section_table::Section::create(flags, pa) |
|
return Arm::Section_table::Section::create(flags, pa) |
|
||||||
|
@ -69,7 +69,7 @@ namespace Arm_v6
|
||||||
unsigned long
|
unsigned long
|
||||||
insert_translation(addr_t const vo, addr_t const pa,
|
insert_translation(addr_t const vo, addr_t const pa,
|
||||||
unsigned long const size_log2,
|
unsigned long const size_log2,
|
||||||
Arm::page_flags_t const flags,
|
Arm::Page_flags::access_t const flags,
|
||||||
void * const extra_space = 0) {
|
void * const extra_space = 0) {
|
||||||
return Arm::Section_table::
|
return Arm::Section_table::
|
||||||
insert_translation<Section_table>(vo, pa, size_log2, flags,
|
insert_translation<Section_table>(vo, pa, size_log2, flags,
|
||||||
|
|
|
@ -57,7 +57,7 @@ namespace Arm_v7
|
||||||
/**
|
/**
|
||||||
* Compose descriptor value
|
* Compose descriptor value
|
||||||
*/
|
*/
|
||||||
static access_t create(Arm::page_flags_t const flags,
|
static access_t create(Arm::Page_flags::access_t const flags,
|
||||||
addr_t const pa,
|
addr_t const pa,
|
||||||
Section_table * const st)
|
Section_table * const st)
|
||||||
{
|
{
|
||||||
|
@ -86,7 +86,7 @@ namespace Arm_v7
|
||||||
unsigned long
|
unsigned long
|
||||||
insert_translation(addr_t const vo, addr_t const pa,
|
insert_translation(addr_t const vo, addr_t const pa,
|
||||||
unsigned long const size_log2,
|
unsigned long const size_log2,
|
||||||
Arm::page_flags_t const flags,
|
Arm::Page_flags::access_t const flags,
|
||||||
void * const extra_space = 0) {
|
void * const extra_space = 0) {
|
||||||
return Arm::Section_table::
|
return Arm::Section_table::
|
||||||
insert_translation<Section_table>(vo, pa, size_log2, flags,
|
insert_translation<Section_table>(vo, pa, size_log2, flags,
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief CPU driver for core
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _VEA9X4__CPU_H_
|
||||||
|
#define _VEA9X4__CPU_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <cpu/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Genode
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* CPU driver for core
|
||||||
|
*/
|
||||||
|
class Cpu : public Cortex_a9::Cpu { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _VEA9X4__CPU_H_ */
|
||||||
|
|
|
@ -1,21 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Kernel support specific for the Versatile VEA9X4
|
|
||||||
* \author Martin Stein
|
|
||||||
* \date 2012-04-23
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _SRC__CORE__VEA9X4__KERNEL_SUPPORT_H_
|
|
||||||
#define _SRC__CORE__VEA9X4__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* local includes */
|
|
||||||
#include <cortex_a9/kernel_support.h>
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__VEA9X4__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Interrupt controller for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _VEA9X4__NO_TRUSTZONE__PIC_H_
|
||||||
|
#define _VEA9X4__NO_TRUSTZONE__PIC_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <pic/cortex_a9_no_trustzone.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Interrupt controller for kernel
|
||||||
|
*/
|
||||||
|
class Pic : public Cortex_a9_no_trustzone::Pic { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _VEA9X4__NO_TRUSTZONE__PIC_H_ */
|
||||||
|
|
|
@ -11,13 +11,11 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Genode includes */
|
/* core includes */
|
||||||
#include <drivers/board_base.h>
|
#include <board.h>
|
||||||
|
|
||||||
/* Core includes */
|
|
||||||
#include <platform.h>
|
#include <platform.h>
|
||||||
#include <cpu/cortex_a9.h>
|
#include <cpu.h>
|
||||||
#include <pic/cortex_a9_no_trustzone.h>
|
#include <pic.h>
|
||||||
|
|
||||||
using namespace Genode;
|
using namespace Genode;
|
||||||
|
|
||||||
|
@ -26,10 +24,10 @@ Native_region * Platform::_ram_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE },
|
{ Board::RAM_0_BASE, Board::RAM_0_SIZE },
|
||||||
{ Board_base::RAM_1_BASE, Board_base::RAM_1_SIZE },
|
{ Board::RAM_1_BASE, Board::RAM_1_SIZE },
|
||||||
{ Board_base::RAM_2_BASE, Board_base::RAM_2_SIZE },
|
{ Board::RAM_2_BASE, Board::RAM_2_SIZE },
|
||||||
{ Board_base::RAM_3_BASE, Board_base::RAM_3_SIZE }
|
{ Board::RAM_3_BASE, Board::RAM_3_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -53,7 +51,7 @@ Native_region * Platform::_core_only_irq_regions(unsigned const i)
|
||||||
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
||||||
|
|
||||||
/* Core UART */
|
/* Core UART */
|
||||||
{ Board_base::PL011_0_IRQ, 1 }
|
{ Board::PL011_0_IRQ, 1 }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -63,8 +61,8 @@ Native_region * Platform::_mmio_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE },
|
{ Board::MMIO_0_BASE, Board::MMIO_0_SIZE },
|
||||||
{ Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE },
|
{ Board::MMIO_1_BASE, Board::MMIO_1_SIZE },
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -75,11 +73,11 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
/* Core timer and PIC */
|
/* Core timer and PIC */
|
||||||
{ Board_base::CORTEX_A9_PRIVATE_MEM_BASE,
|
{ Board::CORTEX_A9_PRIVATE_MEM_BASE,
|
||||||
Board_base::CORTEX_A9_PRIVATE_MEM_SIZE },
|
Board::CORTEX_A9_PRIVATE_MEM_SIZE },
|
||||||
|
|
||||||
/* Core UART */
|
/* Core UART */
|
||||||
{ Board_base::PL011_0_MMIO_BASE, Board_base::PL011_0_MMIO_SIZE }
|
{ Board::PL011_0_MMIO_BASE, Board::PL011_0_MMIO_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
|
@ -0,0 +1,23 @@
|
||||||
|
#
|
||||||
|
# \brief Build config for Genodes core process
|
||||||
|
# \author Stefan Kalkowski
|
||||||
|
# \author Martin Stein
|
||||||
|
# \date 2012-10-04
|
||||||
|
#
|
||||||
|
|
||||||
|
# declare wich specs must be given to build this target
|
||||||
|
REQUIRES += platform_vea9x4
|
||||||
|
ifeq ($(filter-out $(SPECS),trustzone),)
|
||||||
|
REQUIRES += no_trustone
|
||||||
|
endif
|
||||||
|
|
||||||
|
# add include paths
|
||||||
|
INC_DIR += $(REP_DIR)/src/core/vea9x4/no_trustzone
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath platform_support.cc $(REP_DIR)/src/core/vea9x4/no_trustzone
|
||||||
|
vpath platform_services.cc $(BASE_DIR)/src/core
|
||||||
|
|
||||||
|
# include less specific target parts
|
||||||
|
include $(REP_DIR)/src/core/vea9x4/target.inc
|
||||||
|
|
|
@ -0,0 +1,39 @@
|
||||||
|
#
|
||||||
|
# \brief Build config for Genodes core process
|
||||||
|
# \author Stefan Kalkowski
|
||||||
|
# \author Martin Stein
|
||||||
|
# \date 2012-10-04
|
||||||
|
#
|
||||||
|
|
||||||
|
# add include paths
|
||||||
|
INC_DIR += $(REP_DIR)/src/core/vea9x4
|
||||||
|
|
||||||
|
# add C++ sources
|
||||||
|
SRC_CC += platform_services.cc \
|
||||||
|
platform_support.cc \
|
||||||
|
syscall.cc
|
||||||
|
|
||||||
|
# add assembly sources
|
||||||
|
SRC_S += crt0.s \
|
||||||
|
boot_modules.s \
|
||||||
|
mode_transition.s
|
||||||
|
|
||||||
|
#
|
||||||
|
# Check if there are other images wich shall be linked to core.
|
||||||
|
# If not use a dummy boot-modules file wich includes only the symbols.
|
||||||
|
#
|
||||||
|
ifeq ($(wildcard $(BUILD_BASE_DIR)/boot_modules.s),)
|
||||||
|
vpath boot_modules.s $(REP_DIR)/src/core/arm
|
||||||
|
else
|
||||||
|
INC_DIR += $(BUILD_BASE_DIR)
|
||||||
|
vpath boot_modules.s $(BUILD_BASE_DIR)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath mode_transition.s $(REP_DIR)/src/core/arm_v7
|
||||||
|
vpath syscall.cc $(REP_DIR)/src/base/arm
|
||||||
|
vpath crt0.s $(REP_DIR)/src/core/arm
|
||||||
|
|
||||||
|
# include less specific target parts
|
||||||
|
include $(REP_DIR)/src/core/target.inc
|
||||||
|
|
|
@ -1,16 +0,0 @@
|
||||||
#
|
|
||||||
# \brief Makefile for core
|
|
||||||
# \author Stefan Kalkowski
|
|
||||||
# \date 2012-10-04
|
|
||||||
#
|
|
||||||
|
|
||||||
# declare wich specs must be given to build this target
|
|
||||||
REQUIRES = platform_vea9x4
|
|
||||||
|
|
||||||
# adjust link address of a trustzone text segment
|
|
||||||
ifeq ($(filter-out $(SPECS),trustzone),)
|
|
||||||
LD_TEXT_ADDR = 0x48000000
|
|
||||||
endif
|
|
||||||
|
|
||||||
# include less specific target parts
|
|
||||||
include $(REP_DIR)/src/core/target.inc
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Timer for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _VEA9X4__TIMER_H_
|
||||||
|
#define _VEA9X4__TIMER_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <timer/cortex_a9.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Kernel timer
|
||||||
|
*/
|
||||||
|
class Timer : public Cortex_a9::Timer { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _VEA9X4__TIMER_H_ */
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* \brief SW controls for the translation lookaside-buffer
|
* \brief Translation lookaside buffer
|
||||||
* \author Martin Stein
|
* \author Martin Stein
|
||||||
* \date 2012-04-23
|
* \date 2012-04-23
|
||||||
*/
|
*/
|
||||||
|
@ -11,58 +11,40 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _SRC__CORE__VEA9X4__TLB_H_
|
#ifndef _VEA9X4__TLB_H_
|
||||||
#define _SRC__CORE__VEA9X4__TLB_H_
|
#define _VEA9X4__TLB_H_
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <drivers/board_base.h>
|
|
||||||
|
|
||||||
/* core includes */
|
/* core includes */
|
||||||
|
#include <board.h>
|
||||||
#include <tlb/arm_v7.h>
|
#include <tlb/arm_v7.h>
|
||||||
|
|
||||||
/**
|
namespace Genode
|
||||||
* Software TLB-controls
|
|
||||||
*/
|
|
||||||
class Tlb : public Arm_v7::Section_table
|
|
||||||
{
|
{
|
||||||
public:
|
struct Page_flags : Arm::Page_flags { };
|
||||||
|
|
||||||
/**
|
class Tlb : public Arm_v7::Section_table { };
|
||||||
* Placement new
|
|
||||||
*/
|
|
||||||
void * operator new (Genode::size_t, void * p) { return p; }
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Board specific mapping attributes
|
* Translation lookaside buffer of core
|
||||||
*/
|
*/
|
||||||
struct Page_flags : Arm::Page_flags { };
|
class Core_tlb : public Tlb
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
|
||||||
typedef Arm::page_flags_t page_flags_t;
|
/**
|
||||||
|
* Constructor - ensures that core never gets a pagefault
|
||||||
|
*/
|
||||||
|
Core_tlb()
|
||||||
|
{
|
||||||
|
map_core_area(Board::RAM_0_BASE, Board::RAM_0_SIZE, 0);
|
||||||
|
map_core_area(Board::RAM_1_BASE, Board::RAM_1_SIZE, 0);
|
||||||
|
map_core_area(Board::RAM_2_BASE, Board::RAM_2_SIZE, 0);
|
||||||
|
map_core_area(Board::RAM_3_BASE, Board::RAM_3_SIZE, 0);
|
||||||
|
map_core_area(Board::MMIO_0_BASE, Board::MMIO_0_SIZE, 1);
|
||||||
|
map_core_area(Board::MMIO_1_BASE, Board::MMIO_1_SIZE, 1);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
#endif /* _VEA9X4__TLB_H_ */
|
||||||
* TLB of core
|
|
||||||
*/
|
|
||||||
class Core_tlb : public Tlb
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Constructor
|
|
||||||
*
|
|
||||||
* Must ensure that core never gets a pagefault.
|
|
||||||
*/
|
|
||||||
Core_tlb()
|
|
||||||
{
|
|
||||||
using namespace Genode;
|
|
||||||
map_core_area(Board_base::RAM_0_BASE, Board_base::RAM_0_SIZE, 0);
|
|
||||||
map_core_area(Board_base::RAM_1_BASE, Board_base::RAM_1_SIZE, 0);
|
|
||||||
map_core_area(Board_base::RAM_2_BASE, Board_base::RAM_2_SIZE, 0);
|
|
||||||
map_core_area(Board_base::RAM_3_BASE, Board_base::RAM_3_SIZE, 0);
|
|
||||||
map_core_area(Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE, 1);
|
|
||||||
map_core_area(Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE, 1);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__VEA9X4__TLB_H_ */
|
|
||||||
|
|
||||||
|
|
|
@ -11,8 +11,10 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Core includes */
|
/* core includes */
|
||||||
#include <kernel_support.h>
|
#include <cpu.h>
|
||||||
|
|
||||||
|
using namespace Genode;
|
||||||
|
|
||||||
Cpu::User_context::User_context() {
|
Cpu::User_context::User_context() {
|
||||||
cpsr = Psr::init_user_with_trustzone(); }
|
cpsr = Psr::init_user_with_trustzone(); }
|
||||||
|
|
|
@ -1,42 +0,0 @@
|
||||||
/*
|
|
||||||
* \brief Kernel support specific for the Versatile VEA9X4
|
|
||||||
* \author Stefan Kalkowski
|
|
||||||
* \date 2012-10-11
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _SRC__CORE__VEA9X4__TRUSTZONE__KERNEL_SUPPORT_H_
|
|
||||||
#define _SRC__CORE__VEA9X4__TRUSTZONE__KERNEL_SUPPORT_H_
|
|
||||||
|
|
||||||
/* Core includes */
|
|
||||||
#include <timer/cortex_a9.h>
|
|
||||||
#include <cpu/cortex_a9.h>
|
|
||||||
#include <pic/vea9x4_trustzone.h>
|
|
||||||
|
|
||||||
/**
|
|
||||||
* CPU driver
|
|
||||||
*/
|
|
||||||
class Cpu : public Cortex_a9::Cpu { };
|
|
||||||
|
|
||||||
namespace Kernel
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* Programmable interrupt controller
|
|
||||||
*/
|
|
||||||
class Pic : public Vea9x4_trustzone::Pic { };
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Kernel timer
|
|
||||||
*/
|
|
||||||
class Timer : public Cortex_a9::Timer { };
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* _SRC__CORE__VEA9X4__TRUSTZONE__KERNEL_SUPPORT_H_ */
|
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
/*
|
||||||
|
* \brief Interrupt controller for kernel
|
||||||
|
* \author Martin Stein
|
||||||
|
* \date 2012-04-23
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Genode Labs GmbH
|
||||||
|
*
|
||||||
|
* This file is part of the Genode OS framework, which is distributed
|
||||||
|
* under the terms of the GNU General Public License version 2.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _VEA9X4__TRUSTZONE__PIC_H_
|
||||||
|
#define _VEA9X4__TRUSTZONE__PIC_H_
|
||||||
|
|
||||||
|
/* core includes */
|
||||||
|
#include <pic/vea9x4_trustzone.h>
|
||||||
|
|
||||||
|
namespace Kernel
|
||||||
|
{
|
||||||
|
/**
|
||||||
|
* Interrupt controller for kernel
|
||||||
|
*/
|
||||||
|
class Pic : public Vea9x4_trustzone::Pic { };
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* _VEA9X4__TRUSTZONE__PIC_H_ */
|
||||||
|
|
|
@ -11,10 +11,8 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Genode includes */
|
/* core includes */
|
||||||
#include <drivers/board_base.h>
|
#include <board.h>
|
||||||
|
|
||||||
/* Core includes */
|
|
||||||
#include <platform.h>
|
#include <platform.h>
|
||||||
#include <pic/vea9x4_trustzone.h>
|
#include <pic/vea9x4_trustzone.h>
|
||||||
#include <cpu/cortex_a9.h>
|
#include <cpu/cortex_a9.h>
|
||||||
|
@ -26,7 +24,7 @@ Native_region * Platform::_ram_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::RAM_3_BASE, Board_base::RAM_3_SIZE }
|
{ Board::RAM_3_BASE, Board::RAM_3_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -53,7 +51,7 @@ Native_region * Platform::_core_only_irq_regions(unsigned const i)
|
||||||
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
{ Cortex_a9::Cpu::PRIVATE_TIMER_IRQ, 1 },
|
||||||
|
|
||||||
/* Core UART */
|
/* Core UART */
|
||||||
{ Board_base::PL011_0_IRQ, 1 }
|
{ Board::PL011_0_IRQ, 1 }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -63,11 +61,11 @@ Native_region * Platform::_mmio_regions(unsigned const i)
|
||||||
{
|
{
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
{ Board_base::MMIO_0_BASE, Board_base::MMIO_0_SIZE },
|
{ Board::MMIO_0_BASE, Board::MMIO_0_SIZE },
|
||||||
{ Board_base::MMIO_1_BASE, Board_base::MMIO_1_SIZE },
|
{ Board::MMIO_1_BASE, Board::MMIO_1_SIZE },
|
||||||
{ 0x60000000, 0x40000000 },
|
{ 0x60000000, 0x40000000 },
|
||||||
{ Board_base::TZASC_MMIO_BASE, Board_base::TZASC_MMIO_SIZE },
|
{ Board::TZASC_MMIO_BASE, Board::TZASC_MMIO_SIZE },
|
||||||
{ Board_base::TZPC_MMIO_BASE, Board_base::TZPC_MMIO_SIZE },
|
{ Board::TZPC_MMIO_BASE, Board::TZPC_MMIO_SIZE },
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
@ -78,11 +76,11 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
|
||||||
static Native_region _regions[] =
|
static Native_region _regions[] =
|
||||||
{
|
{
|
||||||
/* Core timer and PIC */
|
/* Core timer and PIC */
|
||||||
{ Board_base::CORTEX_A9_PRIVATE_MEM_BASE,
|
{ Board::CORTEX_A9_PRIVATE_MEM_BASE,
|
||||||
Board_base::CORTEX_A9_PRIVATE_MEM_SIZE },
|
Board::CORTEX_A9_PRIVATE_MEM_SIZE },
|
||||||
|
|
||||||
/* Core UART */
|
/* Core UART */
|
||||||
{ Board_base::PL011_0_MMIO_BASE, Board_base::PL011_0_MMIO_SIZE }
|
{ Board::PL011_0_MMIO_BASE, Board::PL011_0_MMIO_SIZE }
|
||||||
};
|
};
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
#
|
||||||
|
# \brief Build config for Genodes core process
|
||||||
|
# \author Stefan Kalkowski
|
||||||
|
# \author Martin Stein
|
||||||
|
# \date 2012-10-04
|
||||||
|
#
|
||||||
|
|
||||||
|
# declare wich specs must be given to build this target
|
||||||
|
REQUIRES += platform_vea9x4 trustzone
|
||||||
|
|
||||||
|
# add include paths
|
||||||
|
INC_DIR += $(REP_DIR)/src/core/vea9x4/trustzone
|
||||||
|
|
||||||
|
# adjust link address of a trustzone text segment
|
||||||
|
LD_TEXT_ADDR = 0x48000000
|
||||||
|
|
||||||
|
# add C++ sources
|
||||||
|
SRC_CC += vm_session_component.cc
|
||||||
|
|
||||||
|
# declare source paths
|
||||||
|
vpath platform_support.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
||||||
|
vpath platform_services.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
||||||
|
vpath kernel_support.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
||||||
|
vpath trustzone.cc $(REP_DIR)/src/core/vea9x4/trustzone
|
||||||
|
vpath vm_session_component.cc $(REP_DIR)/src/core
|
||||||
|
|
||||||
|
# include less specific target parts
|
||||||
|
include $(REP_DIR)/src/core/vea9x4/target.inc
|
||||||
|
|
|
@ -11,10 +11,10 @@
|
||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Core includes */
|
/* core includes */
|
||||||
#include <trustzone.h>
|
#include <trustzone.h>
|
||||||
#include <kernel_support.h>
|
#include <pic.h>
|
||||||
#include <base/printf.h>
|
#include <cpu.h>
|
||||||
|
|
||||||
/* monitor exception vector address */
|
/* monitor exception vector address */
|
||||||
extern int _mon_kernel_entry;
|
extern int _mon_kernel_entry;
|
||||||
|
@ -23,10 +23,10 @@ extern int _mon_kernel_entry;
|
||||||
void Kernel::trustzone_initialization(Pic *pic)
|
void Kernel::trustzone_initialization(Pic *pic)
|
||||||
{
|
{
|
||||||
/* set exception vector entry */
|
/* set exception vector entry */
|
||||||
Cpu::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
|
Genode::Cpu::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
|
||||||
|
|
||||||
/* enable coprocessor access for TZ VMs */
|
/* enable coprocessor access for TZ VMs */
|
||||||
Cpu::allow_coprocessor_nonsecure();
|
Genode::Cpu::allow_coprocessor_nonsecure();
|
||||||
|
|
||||||
/* set unsecure IRQs */
|
/* set unsecure IRQs */
|
||||||
pic->unsecure(34); //Timer 0/1
|
pic->unsecure(34); //Timer 0/1
|
||||||
|
|
Loading…
Reference in New Issue