parent
c58de0d80e
commit
2b2007bc3f
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@ -53,6 +53,12 @@ struct Arm::Pl310 : Genode::Mmio
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struct Invalidate_by_way : Register <0x77c, 32> { };
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struct Invalidate_by_way : Register <0x77c, 32> { };
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struct Clean_invalidate_by_way : Register <0x7fc, 32> { };
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struct Clean_invalidate_by_way : Register <0x7fc, 32> { };
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struct Debug : Register<0xf40, 32>
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{
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struct Dcl : Bitfield<0,1> { };
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struct Dwb : Bitfield<1,1> { };
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};
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Pl310(Genode::addr_t const base) : Mmio(base) { }
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Pl310(Genode::addr_t const base) : Mmio(base) { }
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inline void sync() { while (read<Cache_sync>()) ; }
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inline void sync() { while (read<Cache_sync>()) ; }
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@ -77,9 +77,12 @@ class Genode::L2_cache
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void flush()
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void flush()
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{
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{
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_secure_monitor.call(Secure_monitor::L2_CACHE_SET_DEBUG_REG, 0x3);
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Arm::Pl310::Debug::access_t v = 0;
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Arm::Pl310::Debug::Dwb::set(v, 1);
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Arm::Pl310::Debug::Dcl::set(v, 1);
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_secure_monitor.call(Secure_monitor::L2_CACHE_SET_DEBUG_REG, v);
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_pl310.flush();
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_pl310.flush();
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_secure_monitor.call(Secure_monitor::L2_CACHE_SET_DEBUG_REG, 0x0);
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_secure_monitor.call(Secure_monitor::L2_CACHE_SET_DEBUG_REG, 0);
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}
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}
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void invalidate() { _pl310.invalidate(); }
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void invalidate() { _pl310.invalidate(); }
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