2012-10-23 17:12:09 +02:00
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/*
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2014-07-15 14:51:27 +02:00
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* \brief CPU driver for core
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2012-10-23 17:12:09 +02:00
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* \author Norman Feske
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2012-12-03 17:21:35 +01:00
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* \author Martin stein
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2012-10-23 17:12:09 +02:00
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* \date 2012-08-30
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*/
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/*
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2013-01-10 21:44:47 +01:00
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* Copyright (C) 2012-2013 Genode Labs GmbH
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2012-10-23 17:12:09 +02:00
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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2016-01-20 20:52:51 +01:00
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#ifndef _CORE__INCLUDE__SPEC__ARM_V6__CPU_H_
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#define _CORE__INCLUDE__SPEC__ARM_V6__CPU_H_
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2012-10-23 17:12:09 +02:00
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/* core includes */
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2014-07-15 14:51:27 +02:00
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#include <spec/arm/cpu_support.h>
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2014-07-09 12:03:17 +02:00
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#include <assert.h>
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2012-12-10 13:55:19 +01:00
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#include <board.h>
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2012-10-23 17:12:09 +02:00
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2016-01-19 13:33:04 +01:00
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namespace Genode { class Cpu; }
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2014-07-09 12:03:17 +02:00
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2014-07-15 14:51:27 +02:00
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class Genode::Cpu : public Arm
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2014-07-09 12:03:17 +02:00
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{
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public:
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2012-10-23 17:12:09 +02:00
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/**
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* Cache type register
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*/
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2014-07-09 12:03:17 +02:00
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struct Ctr : Arm::Ctr
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2012-10-23 17:12:09 +02:00
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{
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struct P : Bitfield<23, 1> { }; /* page mapping restriction on */
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};
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/**
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* System control register
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*/
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2014-07-09 12:03:17 +02:00
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struct Sctlr : Arm::Sctlr
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2012-10-23 17:12:09 +02:00
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{
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2014-07-28 16:55:47 +02:00
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struct W : Bitfield<3,1> { }; /* enable write buffer */
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2012-10-23 17:12:09 +02:00
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struct Dt : Bitfield<16,1> { }; /* global data TCM enable */
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struct It : Bitfield<18,1> { }; /* global instruction TCM enable */
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struct U : Bitfield<22,1> { }; /* enable unaligned data access */
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struct Xp : Bitfield<23,1> { }; /* disable subpage AP bits */
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2016-01-11 11:02:52 +01:00
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static void init()
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2014-07-28 16:55:47 +02:00
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{
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2016-01-11 11:02:52 +01:00
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access_t v = read();
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A::set(v, 0);
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V::set(v, 1);
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2014-07-28 16:55:47 +02:00
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W::set(v, 1);
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Dt::set(v, 1);
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It::set(v, 1);
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U::set(v, 1);
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Xp::set(v, 1);
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2016-01-11 11:02:52 +01:00
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write(v);
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2012-10-23 17:12:09 +02:00
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}
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};
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/**
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* If page descriptor bits [13:12] are restricted
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*/
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static bool restricted_page_mappings() {
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return Ctr::P::get(Ctr::read()); }
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/**
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2016-01-11 11:02:52 +01:00
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* Ensure that TLB insertions get applied
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2012-10-23 17:12:09 +02:00
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*/
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2016-01-11 11:02:52 +01:00
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void translation_table_insertions()
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2012-10-23 17:12:09 +02:00
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{
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2016-01-11 11:02:52 +01:00
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clean_invalidate_data_cache();
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invalidate_instr_cache();
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invalidate_tlb();
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2012-10-23 17:12:09 +02:00
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}
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2014-07-04 11:47:41 +02:00
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/**
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2014-07-09 12:03:17 +02:00
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* Post processing after a translation was added to a translation table
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*
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* \param addr virtual address of the translation
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* \param size size of the translation
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2014-07-04 11:47:41 +02:00
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*/
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2016-01-11 11:02:52 +01:00
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static void translation_added(addr_t const addr, size_t const size);
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2014-07-15 14:51:27 +02:00
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/*************
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** Dummies **
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*************/
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static void wait_for_interrupt() { /* FIXME */ }
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static void data_synchronization_barrier() { /* FIXME */ }
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static void invalidate_control_flow_predictions() { /* FIXME */ }
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2014-07-09 12:03:17 +02:00
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};
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2012-10-23 17:12:09 +02:00
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2016-01-20 20:52:51 +01:00
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#endif /* _CORE__INCLUDE__SPEC__ARM_V6__CPU_H_ */
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