2017-02-21 13:46:59 +01:00
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/*
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* \brief Definitions common to all Cortex A15 CPUs
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* \author Stefan Kalkowski
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* \date 2017-02-23
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*/
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/*
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* Copyright (C) 2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__LIB__HW__SPEC__ARM__CORTEX_A15_H_
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#define _SRC__LIB__HW__SPEC__ARM__CORTEX_A15_H_
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#include <base/stdint.h>
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2017-04-28 15:27:26 +02:00
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namespace Hw { template <Genode::addr_t> struct Cortex_a15_mmio; }
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2017-02-21 13:46:59 +01:00
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template <typename Genode::addr_t BASE>
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2017-04-28 15:27:26 +02:00
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struct Hw::Cortex_a15_mmio
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2017-02-21 13:46:59 +01:00
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{
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enum {
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2019-03-22 14:23:07 +01:00
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IRQ_CONTROLLER_DISTR_BASE = BASE + 0x1000UL,
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IRQ_CONTROLLER_DISTR_SIZE = 0x1000UL,
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IRQ_CONTROLLER_CPU_BASE = BASE + 0x2000UL,
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IRQ_CONTROLLER_CPU_SIZE = 0x2000UL,
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IRQ_CONTROLLER_VT_CTRL_BASE = BASE + 0x4000UL,
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IRQ_CONTROLLER_VT_CPU_BASE = BASE + 0x6000UL,
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IRQ_CONTROLLER_VT_CPU_SIZE = 0x1000UL,
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2017-02-21 13:46:59 +01:00
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};
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};
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#endif /* _SRC__LIB__HW__SPEC__ARM__CORTEX_A15_H_ */
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