34 lines
836 B
C
34 lines
836 B
C
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/*
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* \brief Zynq specific board definitions
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* \author Stefan Kalkowski
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* \date 2019-05-16
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*/
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/*
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* Copyright (C) 2019 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_
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#define _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_
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#include <drivers/defs/zynq_qemu.h>
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#include <drivers/uart/xilinx.h>
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#include <hw/spec/arm/cortex_a9.h>
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#include <hw/spec/arm/pl310.h>
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namespace Hw::Zynq_qemu_board {
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using namespace Zynq_qemu;
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using L2_cache = Hw::Pl310;
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using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
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using Serial = Genode::Xilinx_uart;
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enum {
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UART_BASE = UART_0_MMIO_BASE,
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};
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}
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#endif /* _SRC__INCLUDE__HW__SPEC__ARM__ZYNQ_BOARD_H_ */
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