Browse Source

new code with some sanity checking (depends on hw-enabled dcStep)

JonathanS 11 months ago
parent
commit
fcf5162501
4 changed files with 1527 additions and 0 deletions
  1. 914
    0
      src/Trinamic_TMC2130.cpp
  2. 137
    0
      src/Trinamic_TMC2130.h
  3. 319
    0
      src/Trinamic_TMC2130_registers.h
  4. 157
    0
      src/getting_started.ino

+ 914
- 0
src/Trinamic_TMC2130.cpp View File

@@ -0,0 +1,914 @@
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+/**************************************************************************/
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+/*!
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+@file     Trinamic_TMC2130.cpp
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+@author   Moritz Walter
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+@license  GPLv3 (see license.txt)
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+
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+SPI configuration tool for Trinamic TMC2130 Motor Drivers
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+
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+@section  HISTORY
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+
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+v0.1 - it works
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+*/
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+/**************************************************************************/
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+#if ARDUINO >= 100
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+#include "Arduino.h"
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+#else
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+#include "WProgram.h"
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+#endif
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+
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+#include <SPI.h>
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+
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+#include "Trinamic_TMC2130.h"
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+#include "Trinamic_TMC2130_registers.h"
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+
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+Trinamic_TMC2130::Trinamic_TMC2130(uint8_t csPin)
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+{
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+  _csPin=csPin;
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+  _status=0;
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+  _debug="";
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+}
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+
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+// initialize the driver with its CS/SS pin
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+void Trinamic_TMC2130::init() {
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+  pinMode(_csPin, OUTPUT);
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+  digitalWrite(_csPin, HIGH);
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+  init_SPI();
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+  read_STAT();
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+}
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+
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+// initialize SPI
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+void Trinamic_TMC2130::init_SPI() {
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+  SPI.setDataMode(TMC_SPI_DATA_MODE);
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+  SPI.setBitOrder(TMC_SPI_BIT_ORDER);
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+  SPI.setClockDivider(TMC_SPI_CLOCK_DIVIDER);
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+  SPI.begin();
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+}
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+
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+// read status
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+uint8_t Trinamic_TMC2130::read_STAT()
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+{
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+  init_SPI();
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+  digitalWrite(_csPin, LOW);
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+
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+  // read address
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+  _status = SPI.transfer(0x00);
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+
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+  // flush 4 bytes
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+  for(int i=0;i<4;i++){
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+    SPI.transfer(0x00);
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+  }
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+
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+  digitalWrite(_csPin, HIGH);
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+
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+  return _status;
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+}
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+
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+// read a register
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+uint8_t Trinamic_TMC2130::read_REG(uint8_t address, uint32_t *data)
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+{
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+  init_SPI();
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+  digitalWrite(_csPin, LOW);
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+
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+  // read address
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+  _status = SPI.transfer(address&~TMC_WRITE);
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+
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+  // flush 4 bytes
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+  for(int i=0;i<4;i++){
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+    SPI.transfer(0x00);
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+  }
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+
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+  digitalWrite(_csPin, HIGH);
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+  // restart transmission
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+  digitalWrite(_csPin, LOW);
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+
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+  // read address
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+  _status = SPI.transfer(address&~TMC_WRITE);
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+
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+  // retrieve data
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+  *data  = SPI.transfer(0x00)&0xFF;
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+  *data <<=8;
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+  *data |= SPI.transfer(0x00)&0xFF;
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+  *data <<=8;
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+  *data |= SPI.transfer(0x00)&0xFF;
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+  *data <<=8;
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+  *data |= SPI.transfer(0x00)&0xFF;
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+
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+  digitalWrite(_csPin, HIGH);
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+
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+  return _status;
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+}
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+
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+// write to a register
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+uint8_t Trinamic_TMC2130::write_REG(uint8_t address, uint32_t data)
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+{
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+  digitalWrite(_csPin, LOW);
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+
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+  // write address
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+  _status = SPI.transfer(address|TMC_WRITE);
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+
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+  // write data
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+  SPI.transfer((data>>24UL)&0xFF);
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+  SPI.transfer((data>>16UL)&0xFF);
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+  SPI.transfer((data>> 8UL)&0xFF);
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+  SPI.transfer((data>> 0UL)&0xFF);
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+
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+  digitalWrite(_csPin, HIGH);
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+
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+  return _status;
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+}
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+
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+// alter a register using a bitmask
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+uint8_t Trinamic_TMC2130::alter_REG(uint8_t address, uint32_t data, uint32_t mask)
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+{
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+  uint32_t oldData, newData;
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+
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+  read_REG( address, &oldData );
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+
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+  newData = ( oldData&~mask ) | ( data&mask );
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+
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+  write_REG( address, newData );
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+
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+  return _status;
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+}
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+
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+// set single bits in the GCONF register
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+uint8_t Trinamic_TMC2130::set_GCONF(uint8_t position, uint8_t value)
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+{
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+  alter_REG(TMC_REG_GCONF, uint32_t(value)<<position, 0x1UL<<position);
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+
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+  return _status;
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+}
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+
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+// set single bits or values in the chopconf register (constraining masks are applied if necessary)
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+uint8_t Trinamic_TMC2130::set_CHOPCONF(uint8_t position, uint8_t value)
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+{
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+  alter_REG(TMC_REG_CHOPCONF, uint32_t(value)<<position, TMC_CHOPCONF_MASKS[position]<<position);
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+
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+  return _status;
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+}
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+
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+  //////////
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+ // GCONF
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+//////////
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+
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+uint8_t Trinamic_TMC2130::set_I_scale_analog(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_I_SCALE_ANALOG, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_internal_Rsense(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_INTERNAL_RSENSE, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_en_pwm_mode(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_EN_PWM_MODE, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_enc_commutation(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_ENC_COMMUTATION, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_shaft(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_SHAFT, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag0_error(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG0_ERROR, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag0_otpw(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG0_OTPW, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag0_stall(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG0_STALL, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag1_stall(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG1_STALL, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag1_index(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG1_INDEX, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag1_onstate(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG1_ONSTATE, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag1_steps_skipped(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG1_STEPS_SKIPPED, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag0_int_pushpull(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG0_INT_PUSHPULL, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_diag1_int_pushpull(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIAG1_INT_PUSHPULL, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_small_hysteresis(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_SMALL_HYSTERESIS, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_stop_enable(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_STOP_ENABLE, value);
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+
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+  return _status;
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+}
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+
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+uint8_t Trinamic_TMC2130::set_direct_mode(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_DIRECT_MODE, value);
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+
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+  return _status;
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+}
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+
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+/*
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+uint8_t Trinamic_TMC2130::set_test_mode(uint8_t value)
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+{
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+  set_GCONF(TMC_GCONF_TEST_MODE, value);
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+
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+  return _status;
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+}
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+*/
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+
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+//////////
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+// IHOLD_IRUN
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+//////////
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+
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+uint8_t Trinamic_TMC2130::set_IHOLD_IRUN(uint8_t ihold, uint8_t irun, uint8_t iholddelay)
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+{
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+  uint32_t data;
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+  // adding ihold
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+  data = (( uint32_t(ihold)&TMC_IHOLD_MASK )<<TMC_IHOLD );
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+  // adding irun
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+  data |= (( uint32_t(irun)&TMC_IRUN_MASK )<<TMC_IRUN );
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+  // adding iholddelay
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+  data |= (( uint32_t(iholddelay)&TMC_IHOLDDELAY_MASK )<<TMC_IHOLDDELAY );
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+
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+  // writing data
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+  write_REG(TMC_REG_IHOLD_IRUN, data);
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+
300
+  return _status;
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+}
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+
303
+//////////
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+// TPOWERDOWN
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+//////////
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+
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+uint8_t Trinamic_TMC2130::set_TPOWERDOWN(uint8_t value)
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+{
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+  uint32_t data;
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+
311
+  data = value & TMC_TPOWERDOWN_MASK;
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+
313
+  write_REG(TMC_REG_TPOWERDOWN, data);
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+
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+  return _status;
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+}
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+
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+//////////
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+// TSTEP
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+//////////
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+
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+uint32_t Trinamic_TMC2130::get_TSTEP()
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+{
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+  uint32_t data;
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+
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+  read_REG(TMC_REG_TPOWERDOWN, &data);
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+
328
+  data &= TMC_TSTEP_MASK;
329
+
330
+  return data;
331
+}
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+
333
+//////////
334
+// TPWMTHRS
335
+//////////
336
+
337
+uint8_t Trinamic_TMC2130::set_TPWMTHRS(uint32_t value)
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+{
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+  uint32_t data;
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+
341
+  data = value & TMC_TPWMTHRS_MASK;
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+
343
+  write_REG(TMC_REG_TPOWERDOWN, data);
344
+
345
+  return _status;
346
+}
347
+
348
+//////////
349
+// TCOOLTHRS
350
+//////////
351
+
352
+uint8_t Trinamic_TMC2130::set_TCOOLTHRS(uint32_t value)
353
+{
354
+  uint32_t data;
355
+
356
+  data = value & TMC_TCOOLTHRS_MASK;
357
+
358
+  write_REG(TMC_REG_TCOOLTHRS, data);
359
+
360
+  return _status;
361
+}
362
+
363
+//////////
364
+// THIGH
365
+//////////
366
+
367
+uint8_t Trinamic_TMC2130::set_THIGH(uint32_t value)
368
+{
369
+  uint32_t data;
370
+
371
+  data = value & TMC_THIGH_MASK;
372
+
373
+  write_REG(TMC_REG_THIGH, data);
374
+
375
+  return _status;
376
+}
377
+
378
+//////////
379
+// XDIRECT
380
+//////////
381
+
382
+uint8_t Trinamic_TMC2130::set_XDIRECT(int16_t coil_a, int16_t coil_b)
383
+{
384
+  uint32_t data;
385
+
386
+  data = 0x0;
387
+  data |= ( coil_b & TMC_XDIRECT_COIL_B_MASK );
388
+  data = data << TMC_XDIRECT_COIL_B;
389
+  data |= ( coil_a & TMC_XDIRECT_COIL_A_MASK );
390
+  data &= TMC_XDIRECT_MASK;
391
+
392
+  write_REG(TMC_REG_XDIRECT, data);
393
+
394
+  return _status;
395
+}
396
+
397
+uint8_t Trinamic_TMC2130::set_XDIRECT(uint32_t value)
398
+{
399
+  uint32_t data;
400
+
401
+  data = value;// & TMC_XDIRECT_MASK;
402
+
403
+  write_REG(TMC_REG_XDIRECT, data);
404
+
405
+  return _status;
406
+}
407
+
408
+int32_t Trinamic_TMC2130::get_XDIRECT()
409
+{
410
+  uint32_t data;
411
+
412
+  read_REG(TMC_REG_XDIRECT, &data);
413
+
414
+  data &= TMC_XDIRECT_MASK;
415
+
416
+  return data;
417
+}
418
+
419
+//////////
420
+// VDCMIN
421
+//////////
422
+
423
+uint8_t Trinamic_TMC2130::set_VDCMIN(int32_t value)
424
+{
425
+  int32_t data;
426
+
427
+  data = value & TMC_VDCMIN_MASK;
428
+
429
+  write_REG(TMC_REG_VDCMIN, data);
430
+
431
+  return _status;
432
+}
433
+
434
+//////////
435
+// MSLUT
436
+//////////
437
+
438
+uint8_t Trinamic_TMC2130::set_MSLUT0(uint32_t value)
439
+{
440
+  write_REG(TMC_REG_MSLUT0, value);
441
+
442
+  return _status;
443
+}
444
+
445
+uint8_t Trinamic_TMC2130::set_MSLUT1(uint32_t value)
446
+{
447
+  write_REG(TMC_REG_MSLUT1, value);
448
+
449
+  return _status;
450
+}
451
+
452
+uint8_t Trinamic_TMC2130::set_MSLUT2(uint32_t value)
453
+{
454
+  write_REG(TMC_REG_MSLUT2, value);
455
+
456
+  return _status;
457
+}
458
+
459
+uint8_t Trinamic_TMC2130::set_MSLUT3(uint32_t value)
460
+{
461
+  write_REG(TMC_REG_MSLUT3, value);
462
+
463
+  return _status;
464
+}
465
+
466
+uint8_t Trinamic_TMC2130::set_MSLUT4(uint32_t value)
467
+{
468
+  write_REG(TMC_REG_MSLUT4, value);
469
+
470
+  return _status;
471
+}
472
+
473
+uint8_t Trinamic_TMC2130::set_MSLUT5(uint32_t value)
474
+{
475
+  write_REG(TMC_REG_MSLUT5, value);
476
+
477
+  return _status;
478
+}
479
+
480
+uint8_t Trinamic_TMC2130::set_MSLUT6(uint32_t value)
481
+{
482
+  write_REG(TMC_REG_MSLUT6, value);
483
+
484
+  return _status;
485
+}
486
+
487
+uint8_t Trinamic_TMC2130::set_MSLUT7(uint32_t value)
488
+{
489
+  write_REG(TMC_REG_MSLUT7, value);
490
+
491
+  return _status;
492
+}
493
+
494
+//////////
495
+// MSLUTSEL
496
+//////////
497
+
498
+uint8_t Trinamic_TMC2130::set_MSLUTSEL(uint32_t value)
499
+{
500
+  write_REG(TMC_REG_MSLUTSEL, value);
501
+
502
+  return _status;
503
+}
504
+
505
+//////////
506
+// MSLUTSTART
507
+//////////
508
+
509
+uint8_t Trinamic_TMC2130::set_MSLUTSTART(uint8_t start_sin, uint8_t start_sin90)
510
+{
511
+  uint32_t data;
512
+  data = ( uint32_t(start_sin90) & TMC_MSLUTSTART_START_SIN90_MASK );
513
+  data = data<<TMC_MSLUTSTART_START_SIN90;
514
+  data |= ( uint32_t(start_sin) & TMC_MSLUTSTART_START_SIN_MASK );
515
+  data &= TMC_MSLUTSTART_MASK;
516
+
517
+  write_REG(TMC_REG_MSLUTSTART, data);
518
+
519
+  return _status;
520
+}
521
+
522
+//////////
523
+// MSCNT
524
+//////////
525
+
526
+uint16_t Trinamic_TMC2130::get_MSCNT()
527
+{
528
+  uint32_t data;
529
+
530
+  read_REG(TMC_REG_MSCNT, &data);
531
+
532
+  data &= TMC_MSCNT_MASK;
533
+
534
+  data = uint16_t(data);
535
+
536
+  return data;
537
+}
538
+
539
+//////////
540
+// MSCURACT
541
+//////////
542
+
543
+int32_t Trinamic_TMC2130::get_MSCURACT()
544
+{
545
+  uint32_t data;
546
+
547
+  read_REG(TMC_REG_MSCURACT, &data);
548
+
549
+  data &= TMC_MSCURACT_MASK;
550
+
551
+  return data;
552
+}
553
+
554
+//////////
555
+// CHOPCONF
556
+//////////
557
+
558
+uint8_t Trinamic_TMC2130::set_diss2g(uint8_t value)
559
+{
560
+  set_CHOPCONF(TMC_CHOPCONF_DISS2G, value);
561
+
562
+  return _status;
563
+}
564
+
565
+uint8_t Trinamic_TMC2130::set_dedge(uint8_t value)
566
+{
567
+  set_CHOPCONF(TMC_CHOPCONF_DEDGE, value);
568
+
569
+  return _status;
570
+}
571
+
572
+uint8_t Trinamic_TMC2130::set_intpol(uint8_t value)
573
+{
574
+  set_CHOPCONF(TMC_CHOPCONF_INTPOL, value);
575
+
576
+  return _status;
577
+}
578
+
579
+// setting the microstep resolution
580
+uint8_t Trinamic_TMC2130::set_mres(uint16_t value)
581
+{
582
+  uint8_t data = 0;
583
+
584
+  switch(value){
585
+    case 1:
586
+      data = 8;
587
+    break;
588
+    case 2:
589
+      data = 7;
590
+    break;
591
+    case 4:
592
+      data = 6;
593
+    break;
594
+    case 8:
595
+      data = 5;
596
+    break;
597
+    case 16:
598
+      data = 4;
599
+    break;
600
+    case 32:
601
+      data = 3;
602
+    break;
603
+    case 64:
604
+      data = 2;
605
+    break;
606
+    case 128:
607
+      data = 1;
608
+    break;
609
+  }
610
+
611
+  set_CHOPCONF(TMC_CHOPCONF_MRES, data);
612
+
613
+  return _status;
614
+}
615
+
616
+uint8_t Trinamic_TMC2130::set_sync(uint8_t value)
617
+{
618
+  set_CHOPCONF(TMC_CHOPCONF_SYNC, value);
619
+
620
+  return _status;
621
+}
622
+
623
+uint8_t Trinamic_TMC2130::set_vhighchm(uint8_t value)
624
+{
625
+  set_CHOPCONF(TMC_CHOPCONF_VHIGHCHM, value);
626
+
627
+  return _status;
628
+}
629
+
630
+uint8_t Trinamic_TMC2130::set_vhighfs(uint8_t value)
631
+{
632
+  set_CHOPCONF(TMC_CHOPCONF_VHIGHFS, value);
633
+
634
+  return _status;
635
+}
636
+
637
+uint8_t Trinamic_TMC2130::set_vsense(uint8_t value)
638
+{
639
+  set_CHOPCONF(TMC_CHOPCONF_VSENSE, value);
640
+
641
+  return _status;
642
+}
643
+
644
+uint8_t Trinamic_TMC2130::set_tbl(uint8_t value)
645
+{
646
+  set_CHOPCONF(TMC_CHOPCONF_TBL, value);
647
+
648
+  return _status;
649
+}
650
+
651
+uint8_t Trinamic_TMC2130::set_chm(uint8_t value)
652
+{
653
+
654
+  set_CHOPCONF(TMC_CHOPCONF_CHM, value);
655
+
656
+  return _status;
657
+}
658
+
659
+uint8_t Trinamic_TMC2130::set_rndtf(uint8_t value)
660
+{
661
+
662
+  set_CHOPCONF(TMC_CHOPCONF_RNDTF, value);
663
+
664
+  return _status;
665
+}
666
+
667
+uint8_t Trinamic_TMC2130::set_disfdcc(uint8_t value)
668
+{
669
+
670
+  set_CHOPCONF(TMC_CHOPCONF_DISFDCC, value);
671
+
672
+  return _status;
673
+}
674
+
675
+uint8_t Trinamic_TMC2130::set_fd(uint8_t value)
676
+{
677
+
678
+  set_CHOPCONF(TMC_CHOPCONF_FD, value);
679
+
680
+  return _status;
681
+}
682
+
683
+uint8_t Trinamic_TMC2130::set_hend(uint8_t value)
684
+{
685
+
686
+  set_CHOPCONF(TMC_CHOPCONF_HEND, value);
687
+
688
+  return _status;
689
+}
690
+
691
+uint8_t Trinamic_TMC2130::set_hstrt(uint8_t value)
692
+{
693
+
694
+  set_CHOPCONF(TMC_CHOPCONF_HSTRT, value);
695
+
696
+  return _status;
697
+}
698
+
699
+uint8_t Trinamic_TMC2130::set_toff(uint8_t value)
700
+{
701
+
702
+  set_CHOPCONF(TMC_CHOPCONF_TOFF, value);
703
+
704
+  return _status;
705
+}
706
+
707
+  //////////
708
+ // COOLCONF
709
+//////////
710
+
711
+// alter coolconf
712
+uint8_t Trinamic_TMC2130::alter_COOLCONF(uint32_t data, uint32_t mask)
713
+{
714
+  uint32_t newData;
715
+
716
+  _coolconf = ( _coolconf & ~mask ) | ( data & mask );
717
+
718
+  write_REG( TMC_REG_COOLCONF, _coolconf );
719
+
720
+  return _status;
721
+}
722
+
723
+// set coolconf
724
+uint8_t Trinamic_TMC2130::set_COOLCONF(uint8_t position, uint8_t value)
725
+{
726
+
727
+  alter_COOLCONF( uint32_t(value)<<position, TMC_CHOPCONF_MASKS[position]<<position);
728
+
729
+  return _status;
730
+}
731
+
732
+uint8_t Trinamic_TMC2130::set_sfilt(uint8_t value)
733
+{
734
+  //set_CHOPCONF(TMC_COOLCONF_SFILT, value);
735
+  set_COOLCONF(TMC_COOLCONF_SFILT, value);
736
+
737
+  return _status;
738
+}
739
+
740
+uint8_t Trinamic_TMC2130::set_sgt(uint8_t value)
741
+{
742
+  //set_CHOPCONF(TMC_COOLCONF_SGT, value);
743
+  set_COOLCONF(TMC_COOLCONF_SGT, value);
744
+
745
+  return _status;
746
+}
747
+
748
+uint8_t Trinamic_TMC2130::set_seimin(uint8_t value)
749
+{
750
+  set_COOLCONF(TMC_COOLCONF_SEIMIN, value);
751
+
752
+  return _status;
753
+}
754
+
755
+uint8_t Trinamic_TMC2130::set_sedn(uint8_t value)
756
+{
757
+  set_COOLCONF(TMC_COOLCONF_SEDN, value);
758
+
759
+  return _status;
760
+}
761
+
762
+uint8_t Trinamic_TMC2130::set_semax(uint8_t value)
763
+{
764
+  set_COOLCONF(TMC_COOLCONF_SEMAX, value);
765
+
766
+  return _status;
767
+}
768
+
769
+uint8_t Trinamic_TMC2130::set_seup(uint8_t value)
770
+{
771
+  set_COOLCONF(TMC_COOLCONF_SEUP, value);
772
+
773
+  return _status;
774
+}
775
+
776
+uint8_t Trinamic_TMC2130::set_semin(uint8_t value)
777
+{
778
+  set_COOLCONF(TMC_COOLCONF_SEMIN, value);
779
+
780
+  return _status;
781
+}
782
+
783
+  //////////
784
+ // DCCTRL
785
+//////////
786
+
787
+uint8_t Trinamic_TMC2130::set_DCCTRL(uint16_t dc_time, uint16_t dc_sg)
788
+{
789
+  uint32_t data;
790
+  data = ( uint32_t(dc_sg) & TMC_DCCTRL_DC_SG_MASK );
791
+  data = data<<TMC_DCCTRL_DC_SG;
792
+  data |= ( uint32_t(dc_time) & TMC_DCCTRL_DC_TIME_MASK );
793
+  data &= TMC_DCCTRL_MASK;
794
+
795
+  write_REG(TMC_REG_DCCTRL, data);
796
+
797
+  return _status;
798
+}
799
+
800
+  //////////
801
+ // PWMCONF
802
+//////////
803
+
804
+// alter pwmconf
805
+uint8_t Trinamic_TMC2130::alter_PWMCONF(uint32_t data, uint32_t mask)
806
+{
807
+  uint32_t newData;
808
+
809
+  _pwmconf = ( _pwmconf & ~mask ) | ( data & mask );
810
+
811
+  write_REG( TMC_REG_PWMCONF, _pwmconf );
812
+
813
+  return _status;
814
+}
815
+
816
+// set pwmconf
817
+uint8_t Trinamic_TMC2130::set_PWMCONF(uint8_t position, uint8_t value)
818
+{
819
+
820
+  alter_PWMCONF( uint32_t(value)<<position, TMC_CHOPCONF_MASKS[position]<<position );
821
+
822
+  return _status;
823
+}
824
+
825
+uint8_t Trinamic_TMC2130::set_freewheel(uint8_t value)
826
+{
827
+  set_PWMCONF(TMC_PWMCONF_FREEWHEEL, value);
828
+
829
+  return _status;
830
+}
831
+
832
+uint8_t Trinamic_TMC2130::set_pwm_symmetric(uint8_t value)
833
+{
834
+  set_PWMCONF(TMC_PWMCONF_PWM_SYMMETRIC, value);
835
+
836
+  return _status;
837
+}
838
+
839
+uint8_t Trinamic_TMC2130::set_pwm_autoscale(uint8_t value)
840
+{
841
+  set_PWMCONF(TMC_PWMCONF_PWM_AUTOSCALE, value);
842
+
843
+  return _status;
844
+}
845
+
846
+uint8_t Trinamic_TMC2130::set_pwm_freq(uint8_t value)
847
+{
848
+  set_PWMCONF(TMC_PWMCONF_PWM_FREQ, value);
849
+
850
+  return _status;
851
+}
852
+
853
+uint8_t Trinamic_TMC2130::set_PWM_GRAD(uint8_t value)
854
+{
855
+  set_PWMCONF(TMC_PWMCONF_PWM_GRAD, value);
856
+
857
+  return _status;
858
+}
859
+
860
+uint8_t Trinamic_TMC2130::set_PWM_AMPL(uint8_t value)
861
+{
862
+  set_PWMCONF(TMC_PWMCONF_PWM_AMPL, value);
863
+
864
+  return _status;
865
+}
866
+
867
+  //////////
868
+ // ENCM_CTRL
869
+//////////
870
+
871
+uint8_t Trinamic_TMC2130::set_ENCM_CTRL(uint8_t value)
872
+{
873
+  uint8_t data;
874
+
875
+  data = value & TMC_ENCM_CTRL_MASK;
876
+
877
+  write_REG(TMC_REG_ENCM_CTRL, data);
878
+
879
+  return _status;
880
+}
881
+
882
+  //////////
883
+ // STATUS
884
+//////////
885
+
886
+// check the reset status
887
+boolean Trinamic_TMC2130::isReset()
888
+{
889
+  return _status&TMC_SPISTATUS_RESET_MASK ? true : false;
890
+}
891
+
892
+// check the error status
893
+boolean Trinamic_TMC2130::isError()
894
+{
895
+  return _status&TMC_SPISTATUS_ERROR_MASK ? true : false;
896
+}
897
+
898
+// check the stallguard status
899
+boolean Trinamic_TMC2130::isStallguard()
900
+{
901
+  return _status&TMC_SPISTATUS_STALLGUARD_MASK ? true : false;
902
+}
903
+
904
+// check the standstill status
905
+boolean Trinamic_TMC2130::isStandstill()
906
+{
907
+  return _status&TMC_SPISTATUS_STANDSTILL_MASK ? true : false;
908
+}
909
+
910
+// get debug messages
911
+String Trinamic_TMC2130::debug()
912
+{
913
+  return _debug;
914
+}

+ 137
- 0
src/Trinamic_TMC2130.h View File

@@ -0,0 +1,137 @@
1
+/**************************************************************************/
2
+/*!
3
+@file     Trinamic_TMC2130.h
4
+@author   Moritz Walter
5
+@license  GPLv3 (see license.txt)
6
+
7
+SPI configuration tool for Trinamic TMC2130 Motor Drivers
8
+
9
+@section  HISTORY
10
+
11
+v0.1 - it works
12
+*/
13
+/**************************************************************************/
14
+#ifndef TRINAMIC_TMC2130_H
15
+#define TRINAMIC_TMC2130_H
16
+
17
+#if ARDUINO >= 100
18
+#include "Arduino.h"
19
+#else
20
+#include "WProgram.h"
21
+#endif
22
+
23
+#include <SPI.h>
24
+
25
+#include "Trinamic_TMC2130_registers.h"
26
+
27
+class Trinamic_TMC2130{
28
+public:
29
+  Trinamic_TMC2130(uint8_t csPin);
30
+  void init();
31
+  void init_SPI();
32
+
33
+  uint8_t read_STAT();
34
+  uint8_t read_REG( uint8_t address , uint32_t *data );
35
+  uint8_t write_REG( uint8_t address, uint32_t data );
36
+  uint8_t alter_REG(uint8_t address, uint32_t data, uint32_t mask);
37
+
38
+  uint8_t set_GCONF(uint8_t bit, uint8_t value);
39
+  uint8_t set_I_scale_analog(uint8_t value);
40
+  uint8_t set_internal_Rsense(uint8_t value);
41
+  uint8_t set_en_pwm_mode(uint8_t value);
42
+  uint8_t set_enc_commutation(uint8_t value);
43
+  uint8_t set_shaft(uint8_t value);
44
+  uint8_t set_diag0_error(uint8_t value);
45
+  uint8_t set_diag0_otpw(uint8_t value);
46
+  uint8_t set_diag0_stall(uint8_t value);
47
+  uint8_t set_diag1_stall(uint8_t value);
48
+  uint8_t set_diag1_index(uint8_t value);
49
+  uint8_t set_diag1_onstate(uint8_t value);
50
+  uint8_t set_diag1_steps_skipped(uint8_t value);
51
+  uint8_t set_diag0_int_pushpull(uint8_t value);
52
+  uint8_t set_diag1_int_pushpull(uint8_t value);
53
+  uint8_t set_small_hysteresis(uint8_t value);
54
+  uint8_t set_stop_enable(uint8_t value);
55
+  uint8_t set_direct_mode(uint8_t value);
56
+  //uint8_t test_mode(uint8_t value);
57
+
58
+  uint8_t set_IHOLD_IRUN(uint8_t ihold, uint8_t irun, uint8_t iholddelay);
59
+  uint8_t set_TPOWERDOWN(uint8_t value);
60
+  uint32_t get_TSTEP();
61
+  uint8_t set_TPWMTHRS(uint32_t value);
62
+  uint8_t set_TCOOLTHRS(uint32_t value);
63
+  uint8_t set_THIGH(uint32_t value);
64
+  uint8_t set_XDIRECT(uint32_t value);
65
+  uint8_t set_XDIRECT(int16_t coil_a, int16_t coil_b);
66
+  int32_t get_XDIRECT();
67
+  uint8_t set_VDCMIN(int32_t value);
68
+
69
+  uint8_t set_MSLUT0(uint32_t value);
70
+  uint8_t set_MSLUT1(uint32_t value);
71
+  uint8_t set_MSLUT2(uint32_t value);
72
+  uint8_t set_MSLUT3(uint32_t value);
73
+  uint8_t set_MSLUT4(uint32_t value);
74
+  uint8_t set_MSLUT5(uint32_t value);
75
+  uint8_t set_MSLUT6(uint32_t value);
76
+  uint8_t set_MSLUT7(uint32_t value);
77
+  uint8_t set_MSLUTSEL(uint32_t value);
78
+  uint8_t set_MSLUTSTART(uint8_t start_sin, uint8_t start_sin90);
79
+  uint16_t get_MSCNT();
80
+  int32_t get_MSCURACT();
81
+
82
+  uint8_t set_CHOPCONF(uint8_t position, uint8_t value);
83
+  uint8_t set_dedge(uint8_t value);
84
+  uint8_t set_diss2g(uint8_t value);
85
+  uint8_t set_intpol(uint8_t value);
86
+  uint8_t set_mres(uint16_t value);
87
+  uint8_t set_sync(uint8_t value);
88
+  uint8_t set_vhighchm(uint8_t value);
89
+  uint8_t set_vhighfs(uint8_t value);
90
+  uint8_t set_vsense(uint8_t value);
91
+  uint8_t set_tbl(uint8_t value);
92
+  uint8_t set_chm(uint8_t value);
93
+  uint8_t set_rndtf(uint8_t value);
94
+  uint8_t set_disfdcc(uint8_t value);
95
+  uint8_t set_fd(uint8_t value);
96
+  uint8_t set_hend(uint8_t value);
97
+  uint8_t set_hstrt(uint8_t value);
98
+  uint8_t set_toff(uint8_t value);
99
+
100
+  uint8_t alter_COOLCONF(uint32_t data, uint32_t mask);
101
+  uint8_t set_COOLCONF(uint8_t position, uint8_t value);
102
+  uint8_t set_sfilt(uint8_t value);
103
+  uint8_t set_sgt(uint8_t value);
104
+  uint8_t set_seimin(uint8_t value);
105
+  uint8_t set_sedn(uint8_t value);
106
+  uint8_t set_semax(uint8_t value);
107
+  uint8_t set_seup(uint8_t value);
108
+  uint8_t set_semin(uint8_t value);
109
+
110
+  uint8_t set_DCCTRL(uint16_t dc_time, uint16_t dc_sg);
111
+
112
+  uint8_t alter_PWMCONF(uint32_t data, uint32_t mask);
113
+  uint8_t set_PWMCONF(uint8_t position, uint8_t value);
114
+  uint8_t set_freewheel(uint8_t value);
115
+  uint8_t set_pwm_symmetric(uint8_t value);
116
+  uint8_t set_pwm_autoscale(uint8_t value);
117
+  uint8_t set_pwm_freq(uint8_t value);
118
+  uint8_t set_PWM_GRAD(uint8_t value);
119
+  uint8_t set_PWM_AMPL(uint8_t value);
120
+
121
+  uint8_t set_ENCM_CTRL(uint8_t value);
122
+
123
+  boolean isReset();
124
+  boolean isError();
125
+  boolean isStallguard();
126
+  boolean isStandstill();
127
+  String debug();
128
+
129
+private:
130
+  uint32_t _coolconf;
131
+  uint32_t _pwmconf;
132
+  uint8_t _csPin;
133
+  uint8_t _status;
134
+  String _debug;
135
+};
136
+
137
+#endif // TRINAMIC_TMC2130_H

+ 319
- 0
src/Trinamic_TMC2130_registers.h View File

@@ -0,0 +1,319 @@
1
+/**************************************************************************/
2
+/*!
3
+@file     Trinamic_TMC2130_registers.h
4
+@author   Moritz Walter
5
+@license  GPLv3 (see license.txt)
6
+
7
+SPI configuration tool for Trinamic TMC2130 Motor Drivers
8
+
9
+@section  HISTORY
10
+
11
+v0.1 - it works
12
+*/
13
+/**************************************************************************/
14
+#ifndef TRINAMIC_TMC2130_REGISTERS_H
15
+#define TRINAMIC_TMC2130_REGISTERS_H
16
+
17
+#if ARDUINO >= 100
18
+#include "Arduino.h"
19
+#else
20
+#include "WProgram.h"
21
+#endif
22
+
23
+#include <SPI.h>
24
+
25
+// SPI
26
+#define TMC_SPI_CLOCK_DIVIDER SPI_CLOCK_DIV8
27
+#define TMC_SPI_DATA_MODE SPI_MODE3
28
+#define TMC_SPI_BIT_ORDER MSBFIRST
29
+
30
+// RW
31
+#define TMC_READ                         (0x00)
32
+#define TMC_WRITE                        (0x80)
33
+
34
+// SPISTATUS MASKS
35
+#define TMC_SPISTATUS_RESET_MASK         (0x01)
36
+#define TMC_SPISTATUS_ERROR_MASK         (0x02)
37
+#define TMC_SPISTATUS_STALLGUARD_MASK    (0x04)
38
+#define TMC_SPISTATUS_STANDSTILL_MASK    (0x08)
39
+
40
+// REGISTERS
41
+#define TMC_REG_GCONF                    (0x00) // RW //    17 // Global configuration flags
42
+#define TMC_REG_GSTAT                    (0x01) // RC //     3 // Global status flags
43
+#define TMC_REG_IOIN                     (0x04) // R  //   8+8 // Reads the state of all input pins available
44
+#define TMC_REG_IHOLD_IRUN               (0x10) // W  // 5+5+4 // Driver current control
45
+#define TMC_REG_TPOWERDOWN               (0x11) // W  //     8 // sets delay time after stand still (stst) to motor current power down (0-4 seconds) 0_((2^8)-1) * 2^18 tclk
46
+#define TMC_REG_TSTEP                    (0x12) // R  //    20 // Actual measured time between two 1/256 microsteps derived from the step input frequency in units of 1/fCLK. Measured value is (2^20)-1 in case of overflow or stand still
47
+#define TMC_REG_TPWMTHRS                 (0x13) // W  //    20 // Upper velocity threshold for stealthChop voltage PWM mode
48
+#define TMC_REG_TCOOLTHRS                (0x14) // W  //    20 // Lower threshold velocity for switching on smart energy coolStep and stallGuard feature (unsigned)
49
+#define TMC_REG_THIGH                    (0x15) // W  //    20 // Velocity dependend switching into different chopper mode and fullstepping to maximize torque (unsigned)
50
+#define TMC_REG_XDIRECT                  (0x2D) // RW //    32 // specifies motor coil currents and polarity directly programmed via SPI. Use signed, two's complement numbers. In this mode, the current is scaled by IHOLD. Velocity based current regulation of voltage PWM is not available in this mode. +- 255 for both coils
51
+#define TMC_REG_VDCMIN                   (0x33) // W  //    23 // automatic commutation dcStep becomes enabled by the external signal DCEN. VDCMIN is used as the minimum step velocity when the motor is heavily loaded. Hint: Also set DCCTRL parameters in order to operate dcStep
52
+#define TMC_REG_MSLUT0                   (0x60) // W  //    32 // Each bit gives the difference between entry x and entry x+1 when combined with the corresponding MSLUTSEL W bits. Differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90.
53
+#define TMC_REG_MSLUT1                   (0x61) // W  //    32 //
54
+#define TMC_REG_MSLUT2                   (0x62) // W  //    32 //
55
+#define TMC_REG_MSLUT3                   (0x63) // W  //    32 //
56
+#define TMC_REG_MSLUT4                   (0x64) // W  //    32 //
57
+#define TMC_REG_MSLUT5                   (0x65) // W  //    32 //
58
+#define TMC_REG_MSLUT6                   (0x66) // W  //    32 //
59
+#define TMC_REG_MSLUT7                   (0x67) // W  //    32 //
60
+#define TMC_REG_MSLUTSEL                 (0x68) // W  //    32 // defines four segments within each quarter MSLUT wave. Four 2 bit entries determine the meaning of a 0 and a 1 bit in the corresponding segment of MSLUT
61
+#define TMC_REG_MSLUTSTART               (0x69) // W  //   8+8 //
62
+#define TMC_REG_MSCNT                    (0x6A) // R  //    10 //
63
+#define TMC_REG_MSCURACT                 (0x6B) // R  //   9+9 //
64
+#define TMC_REG_CHOPCONF                 (0x6C) // RW //    32 //
65
+#define TMC_REG_COOLCONF                 (0x6D) // W  //    25 //
66
+#define TMC_REG_DCCTRL                   (0x6E) // W  //    24 //
67
+#define TMC_REG_DRV_STATUS               (0x6F) // R  //    22 //
68
+#define TMC_REG_PWMCONF                  (0x70) // W  //     8 //
69
+#define TMC_REG_PWM_SCALE                (0x71) // R  //     8 //
70
+#define TMC_REG_ENCM_CTRL                (0x72) // W  //     2 //
71
+#define TMC_REG_LOST_STEPS               (0x73) // R  //    20 //
72
+
73
+// GCONF OFFSETS
74
+// for shifting incoming values to the right register position
75
+#define TMC_GCONF_I_SCALE_ANALOG               (0) // 0: Internal, 1: AIN
76
+#define TMC_GCONF_INTERNAL_RSENSE              (1) // 0: Normal, 1: Internal
77
+#define TMC_GCONF_EN_PWM_MODE                  (2) // 0: Disable, 1: Enable
78
+#define TMC_GCONF_ENC_COMMUTATION              (3) // 0: Disable, 1: Enable
79
+#define TMC_GCONF_SHAFT                        (4) // 0: Normal, 1: Invert
80
+#define TMC_GCONF_DIAG0_ERROR                  (5) // 0: Disable, 1: Enable
81
+#define TMC_GCONF_DIAG0_OTPW                   (6) // 0: Disable, 1: Enable
82
+#define TMC_GCONF_DIAG0_STALL                  (7) // 0: Disable, 1: Enable
83
+#define TMC_GCONF_DIAG1_STALL                  (8) // 0: Disable, 1: Enable
84
+#define TMC_GCONF_DIAG1_INDEX                  (9) // 0: Disable, 1: Enable
85
+#define TMC_GCONF_DIAG1_ONSTATE                (10) // 0: Disable, 1: Enable
86
+#define TMC_GCONF_DIAG1_STEPS_SKIPPED          (11) // 0: Disable, 1: Enable
87
+#define TMC_GCONF_DIAG0_INT_PUSHPULL           (12) // 0: Open Collector, 1: Push Pull
88
+#define TMC_GCONF_DIAG1_INT_PUSHPULL           (13) // 0: Open Collector, 1: Push Pull
89
+#define TMC_GCONF_SMALL_HYSTERESIS             (14) // 0: 1/16, 1: 1/32
90
+#define TMC_GCONF_STOP_ENABLE                  (15) // 0: Normal, 1: Emergency Stop
91
+#define TMC_GCONF_DIRECT_MODE                  (16) // 0: Normal, 1: XDIRECT
92
+#define TMC_GCONF_TEST_MODE                    (17) // 0: Normal, 1: Enable, Don't use!
93
+
94
+// GCONF MASKS
95
+// not required, all 1 bit
96
+
97
+// IHOLD_IRUN OFFSETS
98
+// for shifting incoming values to the right register position
99
+#define TMC_IHOLD                        (0)
100
+#define TMC_IRUN                         (8)
101
+#define TMC_IHOLDDELAY                   (16)
102
+
103
+// IHOLD IRUN MASKS
104
+#define TMC_IHOLD_MASK                   (0b11111UL)
105
+#define TMC_IRUN_MASK                    (0b11111UL)
106
+#define TMC_IHOLDDELAY_MASK              (0b1111UL)
107
+
108
+// TPOWERDOWN
109
+// no offsets required
110
+#define TMC_TPOWERDOWN_MASK              (0b11111111UL)
111
+
112
+// TSTEP
113
+// no offsets required
114
+#define TMC_TSTEP_MASK                   (0b11111111111111111111UL)
115
+
116
+// TPWMTHRS
117
+// no offsets required
118
+#define TMC_TPWMTHRS_MASK                (0b11111111111111111111UL)
119
+
120
+// TCOOLTHRS
121
+#define TMC_TCOOLTHRS_MASK               (0b11111111111111111111UL)
122
+
123
+// THIGH
124
+// no offsets required
125
+#define TMC_THIGH_MASK                   (0b11111111111111111111UL)
126
+
127
+// XDIRECT OFFSETS
128
+// for shifting incoming values to the right register position
129
+#define TMC_XDIRECT_COIL_A               (0)
130
+#define TMC_XDIRECT_COIL_B               (16)
131
+
132
+// XDIRECT MASKS
133
+// mask the bits from the values we want to set
134
+#define TMC_XDIRECT_MASK                 (0xFFFFFFFFUL)
135
+#define TMC_XDIRECT_COIL_A_MASK          (0xFFFFUL)
136
+#define TMC_XDIRECT_COIL_B_MASK          (0xFFFFUL)
137
+// no offsets required
138
+// needs no mask
139
+
140
+// VDCMIN
141
+// no offsets required
142
+#define TMC_VDCMIN_MASK                  (0b11111111111111111111111UL)
143
+
144
+// MSLUT
145
+// no offsets required
146
+// needs no mask
147
+
148
+// MSLUTSEL
149
+// no offsets required
150
+// needs no mask
151
+
152
+// MSLUTSTART OFFSETS
153
+#define TMC_MSLUTSTART_START_SIN         (0)
154
+#define TMC_MSLUTSTART_START_SIN90       (8)
155
+
156
+// MSLUTSTART MASKS
157
+#define TMC_MSLUTSTART_MASK              (0xFFFFUL)
158
+#define TMC_MSLUTSTART_START_SIN_MASK    (0xFF)
159
+#define TMC_MSLUTSTART_START_SIN90_MASK  (0xFF)
160
+
161
+
162
+// MSCNT
163
+// no offsets required
164
+#define TMC_MSCNT_MASK                   (0b1111111111)
165
+
166
+// MSCURACT
167
+// no offsets required
168
+#define TMC_MSCURACT_MASK                (0b111111111111111111UL)
169
+
170
+// CHOPCONF MASKS
171
+// mask the bits from the values we want to set
172
+
173
+const uint32_t TMC_CHOPCONF_MASKS[] = {
174
+  0b1111UL, // 0 TOFF
175
+  0b111UL,  // 1
176
+  0b11UL,   // 2
177
+  0b1UL,    // 3
178
+  0b111UL,  // 4 HYSTERESIS_START
179
+  0b11UL,   // 5
180
+  0b1UL,    // 6
181
+  0b0001UL, // 7 HYSTERESIS_LOW
182
+  0b001UL,  // 8
183
+  0b01UL,   // 9
184
+  0b1UL,    // 10
185
+  0b1UL,    // 11 FAST_DECAY_TIMING
186
+  0b1UL,    // 12 FAST_DECAY_MODE
187
+  0b1UL,    // 13 RANDOM_TOFF
188
+  0b1UL,    // 14 CHOPPER_MODE
189
+  0b11UL,   // 15 TBL
190
+  0b1UL,    // 16
191
+  0b1UL,    // 17 SENSE_CURRENT_SCALING
192
+  0b1UL,    // 18 HIGH_VELOCITY_STEPS
193
+  0b1UL,    // 19 HIGH_VELOCITY_CHOPPER
194
+  0b1111UL, // 20 SYNC_PWM
195
+  0b111UL,  // 21
196
+  0b11UL,   // 22
197
+  0b1UL,    // 23
198
+  0b1111UL, // 24 MRES
199
+  0b111UL,  // 25
200
+  0b11UL,   // 26
201
+  0b1UL,    // 27
202
+  0b1UL,    // 28 INTERPOLATE
203
+  0b1UL,    // 29 DOUBLE_EDGE_PULSES
204
+  0b1UL,    // 30 SHORT_PROTECTION
205
+  0b1UL     // 31
206
+};
207
+
208
+// CHOPCONF OFFSETS
209
+// for shifting incoming values to the right register position
210
+#define TMC_CHOPCONF_DISS2G                       (30)
211
+#define TMC_CHOPCONF_DEDGE                        (29)
212
+#define TMC_CHOPCONF_INTPOL                       (28)
213
+#define TMC_CHOPCONF_MRES                         (24)
214
+#define TMC_CHOPCONF_SYNC                         (20)
215
+#define TMC_CHOPCONF_VHIGHCHM                     (19)
216
+#define TMC_CHOPCONF_VHIGHFS                      (18)
217
+#define TMC_CHOPCONF_VSENSE                       (17)
218
+#define TMC_CHOPCONF_TBL                          (15)
219
+#define TMC_CHOPCONF_CHM                          (14)
220
+#define TMC_CHOPCONF_RNDTF                        (13)
221
+#define TMC_CHOPCONF_DISFDCC                      (12)
222
+#define TMC_CHOPCONF_FD                           (11)
223
+#define TMC_CHOPCONF_HEND                         (7)
224
+#define TMC_CHOPCONF_HSTRT                        (4)
225
+#define TMC_CHOPCONF_TOFF                         (0)
226
+
227
+// COOLCONF BIT OFFSETS
228
+// for shifting incoming values to the right register position
229
+#define TMC_COOLCONF_SFILT                        (24)
230
+#define TMC_COOLCONF_SGT                          (16)
231
+#define TMC_COOLCONF_SEIMIN                       (15)
232
+#define TMC_COOLCONF_SEDN                         (13)
233
+#define TMC_COOLCONF_SEMAX                        (8)
234
+#define TMC_COOLCONF_SEUP                         (5)
235
+#define TMC_COOLCONF_SEMIN                        (0)
236
+
237
+// COOLCONF MASKS
238
+// mask the bits from the values we want to set
239
+const int TMC_COOLCONF_MASKS[] = {
240
+  0b1111UL, // 0 TMC_COOLCONF_SEMIN
241
+  0b111UL, // 1
242
+  0b11UL, // 2
243
+  0b1UL, // 3
244
+  0b0UL, // 4
245
+  0b11UL, // 5 TMC_COOLCONF_SEUP
246
+  0b1UL, // 6
247
+  0b0UL, // 7
248
+  0b1111UL, // 8 TMC_COOLCONF_SEMAX
249
+  0b111UL, // 9
250
+  0b11UL, // 10
251
+  0b1UL, // 11
252
+  0b0UL, // 12
253
+  0b11UL, // 13 TMC_COOLCONF_SEDN
254
+  0b1UL, // 14
255
+  0b1UL, // 15 TMC_COOLCONF_SEIMIN
256
+  0b1111111UL, // 16 TMC_COOLCONF_SGT
257
+  0b111111UL, // 17
258
+  0b11111UL, // 18
259
+  0b1111UL, // 19
260
+  0b111UL, // 20
261
+  0b11UL, // 21
262
+  0b1UL, // 22
263
+  0b0UL, // 23
264
+  0b1UL, // 24 TMC_COOLCONF_SFILT
265
+};
266
+
267
+// DCCTRL OFFSETS
268
+// for shifting incoming values to the right register position
269
+#define TMC_DCCTRL_DC_TIME                        (0)
270
+#define TMC_DCCTRL_DC_SG                          (16)
271
+
272
+// DCCTRL MASKS
273
+// mask the bits from the values we want to set
274
+#define TMC_DCCTRL_MASK                           (0b1111111111UL)
275
+#define TMC_DCCTRL_DC_TIME_MASK                   (0b11111111UL)
276
+#define TMC_DCCTRL_DC_SG_MASK                     (0b111111110000001111111111UL)
277
+
278
+
279
+// PWMCONF OFFSETS
280
+// for shifting incoming values to the right register position
281
+#define TMC_PWMCONF_FREEWHEEL                     (20)
282
+#define TMC_PWMCONF_PWM_SYMMETRIC                 (19)
283
+#define TMC_PWMCONF_PWM_AUTOSCALE                 (18)
284
+#define TMC_PWMCONF_PWM_FREQ                      (16)
285
+#define TMC_PWMCONF_PWM_GRAD                      (8)
286
+#define TMC_PWMCONF_PWM_AMPL                      (0)
287
+
288
+// PWMCONF MASKS
289
+// mask the bits from the values we want to set
290
+const int TMC_PWMCONF_MASKS[] = {
291
+  0b11111111UL, // 0 TMC_PWMCONF_PWM_AMPL
292
+  0b1111111UL, // 1
293
+  0b111111UL, // 2
294
+  0b11111UL, // 3
295
+  0b1111UL, // 4
296
+  0b111UL, // 5
297
+  0b11UL, // 6
298
+  0b1UL, // 7
299
+  0b11111111UL, // 8 TMC_PWMCONF_PWM_GRAD
300
+  0b1111111UL, // 9
301
+  0b111111UL, // 10
302
+  0b11111UL, // 11
303
+  0b1111UL, // 12
304
+  0b111UL, // 13
305
+  0b11UL, // 14
306
+  0b1UL, // 15
307
+  0b11UL, // 16 TMC_PWMCONF_PWM_FREQ
308
+  0b1UL, // 17
309
+  0b1UL, // 18 TMC_PWMCONF_PWM_AUTOSCALE
310
+  0b1UL, // 19 TMC_PWMCONF_PWM_SYMMETRIC
311
+  0b11UL, // 20 TMC_PWMCONF_FREEWHEEL
312
+  0b1UL, // 21
313
+};
314
+
315
+// ENCM_CTRL MASK
316
+// mask the bits from the values we want to set
317
+#define TMC_ENCM_CTRL_MASK          (0b11);
318
+
319
+#endif // TRINAMIC_TMC2130_REGISTERS_H

+ 157
- 0
src/getting_started.ino View File

@@ -0,0 +1,157 @@
1
+/**************************************************************************/
2
+/*!
3
+@file     getting_started.ino
4
+@author   Moritz Walter
5
+@license  GPLv3 (see license.txt)
6
+
7
+Demo of SPI configuration tool for Trinamic TMC2130 Motor Drivers
8
+
9
+@section  HISTORY
10
+
11
+v0.1 - it works
12
+*/
13
+/**************************************************************************/
14
+
15
+    ////////////////////
16
+   //
17
+  //    HOW TO USE
18
+ //
19
+////////////////////
20
+
21
+// This tool uses hardware SPI
22
+// Just wire the drivers to your SPI pins and define the CS pin below.
23
+// Once flashed, the sketch sends a basic configuration to the driver and makes the motor spin.
24
+
25
+#include <SPI.h>
26
+#include <Trinamic_TMC2130.h>
27
+
28
+// pin configuration (this is the X-axis on a standard RAMPS 1.4)
29
+#define CS_PIN 21
30
+#define EN_PIN 18 //enable (CFG6)
31
+#define DIR_PIN 19 //direction
32
+#define STEP_PIN 20  //step
33
+
34
+Trinamic_TMC2130 myStepper(CS_PIN);
35
+
36
+void setup(){
37
+  while (!Serial);
38
+
39
+  // pins
40
+  pinMode(EN_PIN, OUTPUT);
41
+  pinMode(DIR_PIN, OUTPUT);
42
+  pinMode(STEP_PIN, OUTPUT);
43
+  digitalWrite(EN_PIN, HIGH); // disable driver
44
+  digitalWrite(DIR_PIN, LOW); // chose direction
45
+  digitalWrite(STEP_PIN, LOW); // no step yet
46
+
47
+  
48
+  digitalWrite(EN_PIN, LOW); // enable driver
49
+
50
+  // stepper
51
+  myStepper.init();
52
+  
53
+  Serial.print("REG_IOIN: ");
54
+  uint32_t ioin = 0;
55
+  myStepper.read_REG(TMC_REG_IOIN, &ioin);
56
+  Serial.println(ioin, BIN);
57
+
58
+  if (ioin >> 24 != 0x11) {
59
+      Serial.println("SPI Communication failed or incompatible firmware");
60
+      while (true);
61
+  }
62
+  
63
+  // verify connection
64
+  uint32_t chopconf;
65
+  myStepper.read_REG(TMC_REG_CHOPCONF, &chopconf);
66
+  chopconf = chopconf ^ 0x05;
67
+  myStepper.write_REG(TMC_REG_CHOPCONF, chopconf);
68
+  
69
+  uint32_t chopconf_r;
70
+  myStepper.read_REG(TMC_REG_CHOPCONF, &chopconf_r);
71
+  
72
+
73
+  if (chopconf != chopconf_r) {
74
+      Serial.println("Could not set CHOPCONF!!!");
75
+      Serial.print("Expected ");
76
+      Serial.print(chopconf);
77
+      Serial.print(" Got ");
78
+      Serial.print(chopconf_r);
79
+      while (true);
80
+  }
81
+  
82
+  chopconf = chopconf ^ 0x05;
83
+  myStepper.write_REG(TMC_REG_CHOPCONF, chopconf);
84
+
85
+
86
+  //myStepper.set_mres(64); // ({1,2,4,8,16,32,64,128,256}) number of microsteps
87
+  //myStepper.set_IHOLD_IRUN(31,31,5); // ([0-31],[0-31],[0-5]) sets all currents to maximum
88
+  //myStepper.set_I_scale_analog(1); // ({0,1}) 0: I_REF internal, 1: sets I_REF to AIN
89
+  //myStepper.set_tbl(1); // ([0-3]) set comparator blank time to 16, 24, 36 or 54 clocks, 1 or 2 is recommended
90
+
91
+
92
+  myStepper.set_mres(128);
93
+
94
+//  myStepper.set_tbl(2);
95
+//  myStepper.set_chm(2);
96
+//  myStepper.set_toff(8); // ([0-15]) 0: driver disable, 1: use only with TBL>2, 2-15: off time setting during slow decay phase
97
+
98
+
99
+  myStepper.set_hstrt(0);
100
+  myStepper.set_hend(13);
101
+
102
+
103
+  myStepper.set_IHOLD_IRUN(1,15,15);
104
+  myStepper.set_I_scale_analog(1);
105
+
106
+
107
+  myStepper.set_sgt(127);
108
+
109
+  myStepper.set_TCOOLTHRS(1);
110
+  myStepper.set_TPWMTHRS(1);
111
+
112
+
113
+  myStepper.set_vhighchm(1);
114
+  myStepper.set_vhighfs(1);
115
+  myStepper.set_toff(8); // ([0-15]) 0: driver disable, 1: use only with TBL>2, 2-15: off time setting during slow decay phase
116
+
117
+  // enable dcStep  mode
118
+  myStepper.set_VDCMIN(1);
119
+  myStepper.set_DCCTRL(70, 10);
120
+  
121
+
122
+
123
+  // get ready
124
+  digitalWrite(EN_PIN, LOW); // enable driver
125
+}
126
+
127
+void loop(){
128
+  // make a step
129
+  digitalWrite(STEP_PIN, HIGH);
130
+  delayMicroseconds(23);
131
+  digitalWrite(STEP_PIN, LOW);
132
+  delayMicroseconds(23);
133
+
134
+  uint32_t drv_status = 0;
135
+  myStepper.read_REG(TMC_REG_DRV_STATUS, &drv_status);
136
+  
137
+  uint32_t stallguard = drv_status & 0x1ff;
138
+  //Serial.println(stallguard);
139
+  
140
+  uint32_t current = (drv_status >> 16) & 0x1f;
141
+
142
+  uint32_t lost_steps;
143
+  myStepper.read_REG(TMC_REG_LOST_STEPS, &lost_steps);
144
+
145
+  static int i = 0;
146
+  if ((i++ % 1000) == 0) {
147
+    Serial.print("Lost Steps: ");
148
+    Serial.println(lost_steps);
149
+  }
150
+
151
+  //Serial.println(myStepper.debug());
152
+
153
+  //Serial.println((myStepper.isReset() ? "RESET " : "----- "));
154
+  //Serial.println((myStepper.isError() ? "ERROR " : "----- "));
155
+  //Serial.println((myStepper.isStallguard() ? "SLGRD " : "----- "));
156
+  //Serial.println((myStepper.isStandstill() ? "STILL " : "----- "));
157
+}