Demo for single-bit colors with LED on UP5K Devboard

hdl/Makefile

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+PROJ = rgb
+PIN_DEF = rgb.pcf
+DEVICE = up5k
+
+ARACHNE = arachne-pnr 
+ARACHNE_ARGS = 
+ICEPACK = icepack
+ICETIME = icetime
+ICEPROG = iceprog
+
+all: $(PROJ).bin
+
+%.blif: %.v
+	yosys -p 'synth_ice40 -top top -blif $@' $<
+
+%.asc: $(PIN_DEF) %.blif
+	$(ARACHNE) $(ARACHNE_ARGS) -d $(subst up,,$(subst hx,,$(subst lp,,$(DEVICE)))) -o $@ -p $^
+
+%.bin: %.asc
+	$(ICEPACK) $< $@
+
+%.rpt: %.asc
+	$(ICETIME) -d $(DEVICE) -mtr $@ $<
+
+prog: $(PROJ).bin
+	$(ICEPROG) -S $<
+
+sudo-prog: $(PROJ).bin
+	@echo 'Executing prog as root!!!'
+	sudo $(ICEPROG) -S $<
+
+clean:
+	rm -f $(PROJ).blif $(PROJ).asc $(PROJ).rpt $(PROJ).bin
+
+.SECONDARY:
+.PHONY: all prog clean

hdl/README

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+Simple RGB LED demo for UP5K boards, such as the Lattice "iCE40 UltraPlus Breakout Board" and
+the Lattice "iCE40 UltraPlus Mobile Development Platform".

hdl/rgb.pcf

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+set_io RGB0 39
+set_io RGB1 40
+set_io RGB2 41
+
+set_io D_VSYNC 6 # IOB_13B
+set_io D_HSYNC 9 #// IOB_16A
+
+set_io D_DEN 10  #// 18A
+set_io D_CLK 11 #// 20A
+
+
+set_io D_R 12	#// 22A
+set_io D_G 21	#// 23B
+set_io D_B 13	#// 24A
+

hdl/rgb.v

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+module top(
+  output RGB0, RGB1, RGB2,
+
+  input D_R, D_G, D_B, D_VSYNC, D_HSYNC, D_DEN, D_CLK
+);
+
+wire clk;
+
+SB_HFOSC inthosc (
+  .CLKHFPU(1'b1),
+  .CLKHFEN(1'b1),
+  .CLKHF(clk)
+);
+
+localparam  counter_width = 32;
+
+reg [counter_width-1:0] ctr;
+
+always@(posedge clk)
+begin
+  ctr <= ctr + 1;
+end
+
+
+localparam  pwm_width = 12;
+
+localparam pwm_max = (2**pwm_width) - 1;
+localparam pwm_max_div4 = (2**(pwm_width-2)) - 1;
+
+
+wire [1:0] phase = ctr[counter_width - 1 : counter_width - 2];
+wire [pwm_width-1:0] fade = ctr[counter_width - 3 : counter_width - (2 + pwm_width)];
+wire [pwm_width-1:0] fade_div4 = ctr[counter_width - 3 : counter_width - (pwm_width)];
+
+wire [pwm_width-1:0] r_val, g_val, b_val;
+
+
+wire [pwm_width-1:0] r_acc, g_acc, b_acc;
+
+wire foo = D_R;
+
+reg last_VSYNC;
+
+always@(negedge D_CLK)
+begin
+  last_VSYNC <= D_VSYNC;
+  if (D_VSYNC == 0 && last_VSYNC == 1) begin
+    r_acc <= 12'd0;
+    g_acc <= 12'd0;
+    b_acc <= 12'd0;
+    
+    r_val <= r_acc;
+    g_val <= g_acc;
+    b_val <= b_acc;
+  end else begin
+    if ((D_HSYNC == 0)) begin
+      r_acc <= r_acc + D_R;
+      g_acc <= g_acc + D_G;
+      b_acc <= b_acc + D_B;
+    end
+  end
+end
+
+
+//  Fade R->G->B->W->
+/*assign r_val = (phase == 0) ? pwm_max_div4 + (3 * fade_div4) :
+               (phase == 1) ? pwm_max - fade :
+               (phase == 3) ? fade_div4 :
+               0;
+*/
+
+/*
+assign r_val = D_Rin;
+              
+assign g_val = (phase == 0) ? pwm_max_div4 - fade_div4:
+               (phase == 1) ? fade :
+               (phase == 2) ? pwm_max - fade :
+               (phase == 3) ? fade_div4 :
+               0;
+
+assign b_val = (phase == 0) ? pwm_max_div4 - fade_div4:
+               (phase == 2) ? fade :
+               (phase == 3) ? pwm_max - (3 * fade_div4) :
+               0;
+               */
+
+reg [pwm_width-1:0] pwm_ctr;
+
+reg pwm_r, pwm_g, pwm_b;
+
+always@(posedge clk)
+begin
+  pwm_ctr <= pwm_ctr + 1;
+  pwm_r <= (pwm_ctr < r_val) ? 1'b1 : 1'b0;
+  pwm_g <= (pwm_ctr < g_val) ? 1'b1 : 1'b0;
+  pwm_b <= (pwm_ctr < b_val) ? 1'b1 : 1'b0;
+end
+
+SB_RGBA_DRV RGBA_DRIVER (
+  .CURREN(1'b1),
+  .RGBLEDEN(1'b1),
+  .RGB0PWM(pwm_g),
+  .RGB1PWM(pwm_b),
+  .RGB2PWM(pwm_r),
+  .RGB0(RGB0),
+  .RGB1(RGB1),
+  .RGB2(RGB2)
+);
+
+
+defparam RGBA_DRIVER.CURRENT_MODE = "0b1";
+defparam RGBA_DRIVER.RGB0_CURRENT = "0b000111";
+defparam RGBA_DRIVER.RGB1_CURRENT = "0b000111";
+defparam RGBA_DRIVER.RGB2_CURRENT = "0b000111";
+
+
+endmodule