83 lines
1.9 KiB
C++
83 lines
1.9 KiB
C++
/*
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* \brief Parts of platform that are specific to PBXA9
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* \author Martin Stein
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* \date 2012-04-27
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*/
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/*
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* Copyright (C) 2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode includes */
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#include <drivers/board/pbxa9.h>
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#include <drivers/cpu/cortex_a9/core.h>
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#include <drivers/pic/pl390_base.h>
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/* core includes */
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#include <platform.h>
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using namespace Genode;
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Native_region * Platform::_ram_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Pbxa9::NORTHBRIDGE_DDR_0_BASE, Pbxa9::NORTHBRIDGE_DDR_0_SIZE }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ 0, Pl390_base::MAX_INTERRUPT_ID + 1 }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core timer */
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{ Cortex_a9::PRIVATE_TIMER_IRQ, 1 },
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/* core UART */
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{ Pbxa9::PL011_0_IRQ, 1 }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Pbxa9::SOUTHBRIDGE_APB_BASE, Pbxa9::SOUTHBRIDGE_APB_SIZE },
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{ Pbxa9::NORTHBRIDGE_AHB_BASE, Pbxa9::NORTHBRIDGE_AHB_SIZE }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core timer and PIC */
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{ Pbxa9::CORTEX_A9_PRIVATE_MEM_BASE, Pbxa9::CORTEX_A9_PRIVATE_MEM_SIZE },
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/* core UART */
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{ Pbxa9::PL011_0_MMIO_BASE, Pbxa9::PL011_0_MMIO_SIZE }
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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