71 lines
1.6 KiB
C++
71 lines
1.6 KiB
C++
/*
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* \brief Programmable interrupt controller for core
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* \author Martin Stein
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* \date 2012-10-11
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*/
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/*
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* Copyright (C) 2012-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _PIC__CORTEX_A9_NO_TRUSTZONE_H_
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#define _PIC__CORTEX_A9_NO_TRUSTZONE_H_
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/* core includes */
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#include <cpu/cortex_a9.h>
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#include <pic/cortex_a9.h>
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namespace Cortex_a9_no_trustzone
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{
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using namespace Genode;
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/**
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* Programmable interrupt controller for core
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*/
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class Pic : public Cortex_a9::Pic
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{
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public:
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/**
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* Constructor
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*/
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Pic()
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{
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/* disable device */
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_distr.write<Distr::Icddcr::Enable>(0);
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_cpu.write<Cpu::Iccicr::Enable>(0);
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mask();
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/* supported priority range */
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unsigned const min_prio = _distr.min_priority();
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unsigned const max_prio = _distr.max_priority();
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/* configure every shared peripheral interrupt */
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for (unsigned i=MIN_SPI; i <= _max_interrupt; i++)
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{
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_distr.write<Distr::Icdicr::Edge_triggered>(0, i);
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_distr.write<Distr::Icdipr::Priority>(max_prio, i);
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_distr.write<Distr::Icdiptr::Cpu_targets>(
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Distr::Icdiptr::Cpu_targets::ALL, i);
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}
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/* disable the priority filter */
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_cpu.write<Cpu::Iccpmr::Priority>(min_prio);
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/* disable preemption of interrupt handling by interrupts */
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_cpu.write<Cpu::Iccbpr::Binary_point>(
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Cpu::Iccbpr::Binary_point::NO_PREEMPTION);
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/* enable device */
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_distr.write<Distr::Icddcr::Enable>(1);
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_cpu.write<Cpu::Iccicr::Enable>(1);
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}
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};
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}
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#endif /* _PIC__CORTEX_A9_NO_TRUSTZONE_H_ */
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