103 lines
2.6 KiB
C++
103 lines
2.6 KiB
C++
/*
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* \brief Board driver for core
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* \author Martin Stein
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* \date 2012-11-01
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/* Genode includes */
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#include <drivers/board_base.h>
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namespace Genode
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{
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/**
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* AHB-lite 2v6 to IP bus interface
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*/
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class Aips : public Mmio
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{
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/**
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* Configuration of the masters
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*/
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struct Mpr { enum { ALL_UNBUFFERED_AND_FULLY_TRUSTED = 0x77777777 }; };
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struct Mpr1 : Register<0x0, 32>, Mpr { };
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struct Mpr2 : Register<0x4, 32>, Mpr { };
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/**
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* Configuration of the platform peripherals
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*/
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struct Pacr { enum { ALL_UNBUFFERED_AND_FULLY_UNPROTECTED = 0 }; };
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struct Pacr1 : Register<0x20, 32>, Pacr { };
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struct Pacr2 : Register<0x24, 32>, Pacr { };
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struct Pacr3 : Register<0x28, 32>, Pacr { };
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struct Pacr4 : Register<0x2c, 32>, Pacr { };
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/**
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* Configuration of the off-platform peripherals
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*/
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struct Opacr1 : Register<0x40, 32>, Pacr { };
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struct Opacr2 : Register<0x44, 32>, Pacr { };
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struct Opacr3 : Register<0x48, 32>, Pacr { };
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struct Opacr4 : Register<0x4c, 32>, Pacr { };
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struct Opacr5 : Register<0x50, 32>, Pacr { };
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public:
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/**
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* Constructor
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*/
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Aips(addr_t const base) : Mmio(base) { }
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/**
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* Configure this module appropriately for the first kernel run
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*/
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void prepare_kernel()
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{
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/* avoid AIPS intervention at any memory access */
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write<Mpr1>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
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write<Mpr2>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
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write<Pacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr5>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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}
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};
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/**
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* Board driver for core
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*/
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struct Board : Board_base
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{
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/**
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* Static AIPS 1 instance
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*/
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static Aips * aips_1() { static Aips a(AIPS_1_MMIO_BASE); return &a; }
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/**
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* Static AIPS 2 instance
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*/
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static Aips * aips_2() { static Aips a(AIPS_2_MMIO_BASE); return &a; }
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/**
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* Configure this module appropriately for the first kernel run
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*/
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static void prepare_kernel()
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{
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aips_1()->prepare_kernel();
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aips_2()->prepare_kernel();
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}
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static void outer_cache_invalidate() { }
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static void outer_cache_flush() { }
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static bool is_smp() { return false; }
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};
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}
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#endif /* _BOARD_H_ */
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