800f9d1e44
Issue #2338
594 lines
14 KiB
C++
594 lines
14 KiB
C++
/*
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* \brief NEC XHCI device frontend
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* \author Josef Soentgen
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* \author Sebastian Sumpf
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* \date 2015-12-10
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is distributed under the terms of the GNU General Public License
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* version 2.
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*/
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/* Genode includes */
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#include <base/log.h>
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#include <base/attached_rom_dataspace.h>
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#include <util/list.h>
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/* qemu-usb includes */
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#include <qemu/usb.h>
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/* Virtualbox includes */
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#define LOG_GROUP LOG_GROUP_DEV_EHCI
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#include <VBox/pci.h>
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#include <VBox/vmm/pdm.h>
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#include <VBox/vmm/pgm.h>
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#include <VBox/vmm/mm.h>
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#include <VBox/err.h>
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#include <VBox/log.h>
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#include <iprt/assert.h>
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#include <iprt/string.h>
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#include <iprt/asm.h>
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#include <iprt/asm-math.h>
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#include <iprt/semaphore.h>
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#include <iprt/critsect.h>
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#ifdef IN_RING3
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# include <iprt/alloca.h>
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# include <iprt/mem.h>
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# include <iprt/thread.h>
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# include <iprt/uuid.h>
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#endif
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#include <VBox/vusb.h>
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#include <VBoxDD.h>
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/* VBox Genode specific */
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#include "vmm.h"
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static bool const verbose_timer = false;
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/************************
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** xHCI device struct **
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************************/
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struct Timer_queue;
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struct Destruction_helper;
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struct XHCI
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{
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/** The PCI device. */
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PDMPCIDEV PciDev;
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/** Pointer to the device instance - R3 ptr. */
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PPDMDEVINSR3 pDevInsR3;
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/** Pointer to the device instance - R0 ptr */
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PPDMDEVINSR0 pDevInsR0;
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/** Pointer to the device instance - RC ptr. */
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PPDMDEVINSRC pDevInsRC;
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/** Address of the MMIO region assigned by PCI. */
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RTGCPHYS32 MMIOBase;
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/** Receiver thread that handles all USB signals. */
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PPDMTHREAD pThread;
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PTMTIMERR3 controller_timer;
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Timer_queue *timer_queue;
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Qemu::Controller *ctl;
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Genode::Signal_receiver *usb_sig_rec;
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Destruction_helper *destruction_helper;
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};
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/** Pointer to XHCI device data. */
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typedef struct XHCI *PXHCI;
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/** Read-only pointer to the XHCI device data. */
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typedef struct XHCI const *PCXHCI;
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/*************************************
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** Qemu::Controller helper classes **
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*************************************/
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struct Timer_queue : public Qemu::Timer_queue
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{
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struct Context : public Genode::List<Context>::Element
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{
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uint64_t timeout_abs_ns = ~0ULL;
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bool pending = false;
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void *qtimer = nullptr;
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void (*cb)(void*) = nullptr;
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void *data = nullptr;
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Context(void *qtimer, void (*cb)(void*), void *data)
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: qtimer(qtimer), cb(cb), data(data) { }
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};
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Genode::List<Context> _context_list;
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PTMTIMER tm_timer;
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void _append_new_context(void *qtimer, void (*cb)(void*), void *data)
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{
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Context *new_ctx = new (vmm_heap()) Context(qtimer, cb, data);
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_context_list.insert(new_ctx);
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}
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Context *_find_context(void const *qtimer)
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{
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for (Context *c = _context_list.first(); c; c = c->next())
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if (c->qtimer == qtimer)
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return c;
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return nullptr;
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}
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Context *_min_pending()
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{
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Context *min = nullptr;
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for (min = _context_list.first(); min; min = min->next())
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if (min && min->pending)
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break;
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if (!min || !min->next())
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return min;
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for (Context *c = min->next(); c; c = c->next()) {
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if (c->timeout_abs_ns < min->timeout_abs_ns && c->pending)
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min = c;
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}
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return min;
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}
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void _program_min_timer()
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{
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Context *min = _min_pending();
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if (min == nullptr) return;
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if (TMTimerIsActive(tm_timer))
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TMTimerStop(tm_timer);
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TMTimerSetNano(tm_timer, min->timeout_abs_ns - TMTimerGetNano(tm_timer));
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}
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void _deactivate_timer(void *qtimer)
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{
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Context *c = _find_context(qtimer);
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if (c == nullptr) {
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Genode::error("qtimer: ", qtimer, " not found");
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throw -1;
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}
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if (c->pending) {
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Context *min = _min_pending();
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if (min == c) {
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TMTimerStop(tm_timer);
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_program_min_timer();
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}
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}
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c->pending = false;
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}
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Timer_queue(PTMTIMER timer) : tm_timer(timer) { }
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void timeout()
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{
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uint64_t now = TMTimerGetNano(tm_timer);
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for (Context *c = _context_list.first(); c; c = c->next()) {
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if (c->pending && c->timeout_abs_ns <= now) {
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Qemu::usb_timer_callback(c->cb, c->data);
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c->pending = false;
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}
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}
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_program_min_timer();
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}
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/**********************
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** TMTimer callback **
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**********************/
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static DECLCALLBACK(void) tm_timer_cb(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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Timer_queue *q = pThis->timer_queue;
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q->timeout();
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}
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unsigned count_timer()
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{
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unsigned res = 0;
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for (Context *c = _context_list.first(); c; c = c->next()) {
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if (c->pending) Genode::log("timer: ", c, " is pending");
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res++;
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}
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return res;
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}
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/*********************************
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** Qemu::Timer_queue interface **
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*********************************/
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Qemu::int64_t get_ns() { return TMTimerGetNano(tm_timer); }
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Genode::Lock _timer_lock;
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void register_timer(void *qtimer, void (*cb)(void*), void *data) override
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{
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Genode::Lock::Guard lock_guard(_timer_lock);
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if (verbose_timer)
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Genode::log("qtimer: ", qtimer, " cb: ", cb, " data: ", data);
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Context *c = _find_context(qtimer);
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if (c != nullptr) {
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Genode::error("qtimer: ", qtimer, " already registred");
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throw -1;
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}
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_append_new_context(qtimer, cb, data);
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}
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void delete_timer(void *qtimer) override
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{
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Genode::Lock::Guard lock_guard(_timer_lock);
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if (verbose_timer)
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Genode::log("qtimer: ", qtimer);
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Context *c = _find_context(qtimer);
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if (c == nullptr) {
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Genode::error("qtimer: ", qtimer, " not found");
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throw -1;
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}
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_deactivate_timer(qtimer);
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_context_list.remove(c);
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Genode::destroy(vmm_heap(), c);
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}
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void activate_timer(void *qtimer, long long int expire_abs) override
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{
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Genode::Lock::Guard lock_guard(_timer_lock);
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if (verbose_timer)
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Genode::log("qtimer: ", qtimer, " expire: ", expire_abs);
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Context *c = _find_context(qtimer);
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if (c == nullptr) {
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Genode::error("qtimer: ", qtimer, " not found");
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throw -1;
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}
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c->timeout_abs_ns = expire_abs;
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c->pending = true;
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_program_min_timer();
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}
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void deactivate_timer(void *qtimer) override
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{
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Genode::Lock::Guard lock_guard(_timer_lock);
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if (verbose_timer)
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Genode::log("qtimer: ", qtimer);
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_deactivate_timer(qtimer);
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}
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};
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struct Pci_device : public Qemu::Pci_device
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{
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PPDMDEVINS pci_dev;
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Pci_device(PPDMDEVINS pDevIns) : pci_dev(pDevIns) { }
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void raise_interrupt(int level) override {
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PDMDevHlpPCISetIrqNoWait(pci_dev, 0, level); }
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int read_dma(Qemu::addr_t addr, void *buf, Qemu::size_t size) override {
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return PDMDevHlpPhysRead(pci_dev, addr, buf, size); }
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int write_dma(Qemu::addr_t addr, void const *buf, Qemu::size_t size) override {
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return PDMDevHlpPhysWrite(pci_dev, addr, buf, size); }
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void *map_dma(Qemu::addr_t base, Qemu::size_t size) override
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{
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PGMPAGEMAPLOCK lock;
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void * vmm_addr = nullptr;
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int rc = PDMDevHlpPhysGCPhys2CCPtr(pci_dev, base, 0, &vmm_addr, &lock);
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Assert(rc == VINF_SUCCESS);
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/* the mapping doesn't go away, so release internal lock immediately */
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PDMDevHlpPhysReleasePageMappingLock(pci_dev, &lock);
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return vmm_addr;
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}
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void unmap_dma(void *addr, Qemu::size_t size) override { }
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};
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/*************************************
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** Qemu::Usb signal thread backend **
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*************************************/
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struct Destruction_helper
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{
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Genode::Signal_receiver &sig_rec;
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Genode::Signal_dispatcher<Destruction_helper> dispatcher {
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sig_rec, *this, &Destruction_helper::handle };
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void handle(unsigned) { }
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Destruction_helper(Genode::Signal_receiver &sig_rec)
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: sig_rec(sig_rec) { }
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};
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static DECLCALLBACK(int) usb_signal_thread(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
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return VINF_SUCCESS;
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while (pThread->enmState == PDMTHREADSTATE_RUNNING)
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{
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Genode::Signal sig = pThis->usb_sig_rec->wait_for_signal();
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int num = sig.num();
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Genode::Signal_dispatcher_base *dispatcher;
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dispatcher = dynamic_cast<Genode::Signal_dispatcher_base *>(sig.context());
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if (dispatcher) {
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dispatcher->dispatch(num);
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}
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}
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return VINF_SUCCESS;
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}
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static DECLCALLBACK(int) usb_signal_thread_wakeup(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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Genode::Signal_transmitter(pThis->destruction_helper->dispatcher).submit();
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return VINF_SUCCESS;
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}
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/***********************************************
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** Virtualbox Device function implementation **
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***********************************************/
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/**
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* @callback_method_impl{FNIOMMMIOREAD}
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*/
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PDMBOTHCBDECL(int) xhciMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr,
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void *pv, unsigned cb)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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Genode::off_t offset = GCPhysAddr - pThis->MMIOBase;
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Qemu::Controller *ctl = pThis->ctl;
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ctl->mmio_read(offset, pv, cb);
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return 0;
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}
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/**
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* @callback_method_impl{FNIOMMMIOWRITE}
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*/
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PDMBOTHCBDECL(int) xhciMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr,
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void const *pv, unsigned cb)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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Genode::off_t offset = GCPhysAddr - pThis->MMIOBase;
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Qemu::Controller *ctl = pThis->ctl;
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ctl->mmio_write(offset, pv, cb);
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return 0;
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}
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/**
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* @callback_method_impl{FNPCIIOREGIONMAP}
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*/
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static DECLCALLBACK(int) xhciR3Map(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
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uint32_t iRegion, RTGCPHYS GCPhysAddress,
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RTGCPHYS cb, PCIADDRESSSPACE enmType)
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{
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PXHCI pThis = (PXHCI)pPciDev;
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int rc = PDMDevHlpMMIORegister(pThis->CTX_SUFF(pDevIns), GCPhysAddress, cb, NULL /*pvUser*/,
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IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED
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// | IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE,
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,
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xhciMmioWrite, xhciMmioRead, "USB XHCI");
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if (RT_FAILURE(rc))
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return rc;
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rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/,
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"xhciMmioWrite", "xhciMmioRead");
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if (RT_FAILURE(rc))
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return rc;
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pThis->MMIOBase = GCPhysAddress;
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return VINF_SUCCESS;
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}
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/**
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* @interface_method_impl{PDMDEVREG,pfnReset}
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*/
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static DECLCALLBACK(void) xhciReset(PPDMDEVINS pDevIns)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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Qemu::usb_reset();
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Qemu::usb_update_devices();
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}
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/**
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* @interface_method_impl{PDMDEVREG,pfnDestruct}
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*/
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static DECLCALLBACK(int) xhciDestruct(PPDMDEVINS pDevIns)
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{
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Qemu::usb_reset();
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return 0;
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}
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/**
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* @interface_method_impl{PDMDEVREG,pfnConstruct,XHCI constructor}
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*/
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static DECLCALLBACK(int) xhciR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
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{
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PXHCI pThis = PDMINS_2_DATA(pDevIns, PXHCI);
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PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
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pThis->usb_sig_rec = new (vmm_heap()) Genode::Signal_receiver();
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pThis->destruction_helper = new (vmm_heap())
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Destruction_helper(*(pThis->usb_sig_rec));
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int rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, Timer_queue::tm_timer_cb,
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pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
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"NEC-XHCI Timer", &pThis->controller_timer);
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static Timer_queue timer_queue(pThis->controller_timer);
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pThis->timer_queue = &timer_queue;
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static Pci_device pci_device(pDevIns);
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rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThread, pThis,
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usb_signal_thread, usb_signal_thread_wakeup,
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32 * 1024 , RTTHREADTYPE_IO, "usb_signal");
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pThis->ctl = Qemu::usb_init(timer_queue, pci_device, *pThis->usb_sig_rec,
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vmm_heap(), genode_env());
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/*
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* Init instance data.
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*/
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pThis->pDevInsR3 = pDevIns;
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pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
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pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
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PCIDevSetVendorId (&pThis->PciDev, 0x1033); /* PCI_VENDOR_ID_NEC */
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PCIDevSetDeviceId (&pThis->PciDev, 0x0194); /* PCI_DEVICE_ID_NEC_UPD720200 */
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PCIDevSetClassProg (&pThis->PciDev, 0x30); /* xHCI */
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PCIDevSetClassSub (&pThis->PciDev, 0x03);
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PCIDevSetClassBase (&pThis->PciDev, 0x0c);
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PCIDevSetInterruptPin (&pThis->PciDev, 0x01);
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PCIDevSetByte (&pThis->PciDev, 0x60, 0x30); /* Serial Bus Release Number Register */
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#ifdef VBOX_WITH_MSI_DEVICES
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PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_CAP_LIST);
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PCIDevSetCapabilityList(&pThis->PciDev, 0x80);
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#endif
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/*
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* Register PCI device and I/O region.
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*/
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rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
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if (RT_FAILURE(rc))
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return rc;
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#ifdef VBOX_WITH_MSI_DEVICES
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PDMMSIREG MsiReg;
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RT_ZERO(MsiReg);
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MsiReg.cMsiVectors = 1;
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MsiReg.iMsiCapOffset = 0x80;
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MsiReg.iMsiNextOffset = 0x00;
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rc = PDMDevHlpPCIRegisterMsi(pDevIns, &MsiReg);
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if (RT_FAILURE(rc))
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{
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PCIDevSetCapabilityList(&pThis->PciDev, 0x0);
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/* That's OK, we can work without MSI */
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}
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#endif
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rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, pThis->ctl->mmio_size(),
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PCI_ADDRESS_SPACE_MEM, xhciR3Map);
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|
if (RT_FAILURE(rc))
|
|
return rc;
|
|
|
|
return VINF_SUCCESS;
|
|
}
|
|
|
|
const PDMDEVREG g_DeviceXHCI =
|
|
{
|
|
/* u32version */
|
|
PDM_DEVREG_VERSION,
|
|
/* szName */
|
|
"nec-xhci",
|
|
/* szRCMod */
|
|
"VBoxDDGC.gc",
|
|
/* szR0Mod */
|
|
"VBoxDDR0.r0",
|
|
/* pszDescription */
|
|
"NEC XHCI USB controller.\n",
|
|
/* fFlags */
|
|
PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC,
|
|
/* fClass */
|
|
PDM_DEVREG_CLASS_BUS_USB,
|
|
/* cMaxInstances */
|
|
~0U,
|
|
/* cbInstance */
|
|
sizeof(XHCI),
|
|
/* pfnConstruct */
|
|
xhciR3Construct,
|
|
/* pfnDestruct */
|
|
xhciDestruct,
|
|
/* pfnRelocate */
|
|
NULL,
|
|
/* pfnMemSetup */
|
|
NULL,
|
|
/* pfnPowerOn */
|
|
NULL,
|
|
/* pfnReset */
|
|
xhciReset,
|
|
/* pfnSuspend */
|
|
NULL,
|
|
/* pfnResume */
|
|
NULL,
|
|
/* pfnAttach */
|
|
NULL,
|
|
/* pfnDetach */
|
|
NULL,
|
|
/* pfnQueryInterface */
|
|
NULL,
|
|
/* pfnInitComplete */
|
|
NULL,
|
|
/* pfnPowerOff */
|
|
NULL,
|
|
/* pfnSoftReset */
|
|
NULL,
|
|
/* u32VersionEnd */
|
|
PDM_DEVREG_VERSION
|
|
};
|
|
|
|
|
|
bool use_xhci_controller()
|
|
{
|
|
try {
|
|
Genode::Attached_rom_dataspace config(genode_env(), "config");
|
|
return config.xml().attribute_value("xhci", false);
|
|
} catch (Genode::Rom_connection::Rom_connection_failed) {
|
|
return false;
|
|
}
|
|
}
|