dd22c961c9
- Adjust list of Muen components - vbox: Sync hw_x86_64_muen subject state with Muen SK
123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
/*
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* \brief Muen subject state
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* \author Adrian-Ken Rueegsegger
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* \author Reto Buerki
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*/
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/*
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* Copyright (C) 2015-2016 Genode Labs GmbH
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*
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* This file is distributed under the terms of the GNU General Public License
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* version 2.
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*/
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#ifndef _VIRTUALBOX__SPEC__MUEN__VCPU_H_
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#define _VIRTUALBOX__SPEC__MUEN__VCPU_H_
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#include <base/stdint.h>
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struct Cpu_registers
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{
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Genode::uint64_t Cr2;
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Genode::uint64_t Rax;
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Genode::uint64_t Rbx;
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Genode::uint64_t Rcx;
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Genode::uint64_t Rdx;
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Genode::uint64_t Rdi;
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Genode::uint64_t Rsi;
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Genode::uint64_t Rbp;
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Genode::uint64_t R08;
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Genode::uint64_t R09;
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Genode::uint64_t R10;
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Genode::uint64_t R11;
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Genode::uint64_t R12;
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Genode::uint64_t R13;
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Genode::uint64_t R14;
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Genode::uint64_t R15;
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} __attribute__((packed));
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struct Segment
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{
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Genode::uint64_t sel;
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Genode::uint64_t base;
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Genode::uint32_t limit;
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Genode::uint32_t access;
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} __attribute__((packed));
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struct Subject_state
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{
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struct Cpu_registers Regs;
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Genode::uint32_t Exit_reason;
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Genode::uint32_t Intr_state;
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Genode::uint32_t Interrupt_info;
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Genode::uint32_t Sysenter_cs;
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Genode::uint64_t Exit_qualification;
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Genode::uint64_t Guest_phys_addr;
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Genode::uint64_t Instruction_len;
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Genode::uint64_t Rip;
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Genode::uint64_t Rsp;
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Genode::uint64_t Cr0;
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Genode::uint64_t Shadow_cr0;
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Genode::uint64_t Cr3;
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Genode::uint64_t Cr4;
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Genode::uint64_t Shadow_cr4;
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Genode::uint64_t Rflags;
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Genode::uint64_t Ia32_efer;
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Genode::uint64_t Sysenter_esp;
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Genode::uint64_t Sysenter_eip;
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Segment cs;
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Segment ss;
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Segment ds;
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Segment es;
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Segment fs;
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Segment gs;
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Segment tr;
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Segment ldtr;
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Segment gdtr;
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Segment idtr;
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} __attribute__((packed));
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/**
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* Print subject state information
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*/
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inline void dump_register_state(Subject_state * state)
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{
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PINF("subject state");
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PLOG("ip:sp:efl ax:bx:cx:dx:si:di %lx:%lx:%lx %lx:%lx:%lx:%lx:%lx:%lx",
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state->Rip, state->Rsp, state->Rflags,
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state->Regs.Rax, state->Regs.Rbx, state->Regs.Rcx, state->Regs.Rdx,
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state->Regs.Rsi, state->Regs.Rdi);
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PLOG("cs base:limit:sel:ar %lx:%x:%x:%x", state->cs.base,
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state->cs.limit, state->cs.sel, state->cs.access);
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PLOG("ds base:limit:sel:ar %lx:%x:%x:%x", state->ds.base,
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state->ds.limit, state->ds.sel, state->ds.access);
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PLOG("es base:limit:sel:ar %lx:%x:%x:%x", state->es.base,
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state->es.limit, state->es.sel, state->es.access);
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PLOG("fs base:limit:sel:ar %lx:%x:%x:%x", state->fs.base,
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state->fs.limit, state->fs.sel, state->fs.access);
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PLOG("gs base:limit:sel:ar %lx:%x:%x:%x", state->gs.base,
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state->gs.limit, state->gs.sel, state->gs.access);
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PLOG("ss base:limit:sel:ar %lx:%x:%x:%x", state->ss.base,
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state->ss.limit, state->ss.sel, state->ss.access);
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PLOG("cr0:cr2:cr3:cr4 %lx:%lx:%lx:%lx",
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state->Cr0, state->Regs.Cr2, state->Cr3, state->Cr4);
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PLOG("ldtr base:limit:sel:ar %lx:%x:%x:%x", state->ldtr.base,
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state->ldtr.limit, state->ldtr.sel, state->ldtr.access);
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PLOG("tr base:limit:sel:ar %lx:%x:%x:%x", state->tr.base,
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state->tr.limit, state->tr.sel, state->tr.access);
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PLOG("gdtr base:limit %lx:%x", state->gdtr.base, state->gdtr.limit);
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PLOG("idtr base:limit %lx:%x", state->idtr.base, state->idtr.limit);
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PLOG("sysenter cs:eip:esp %lx %lx %lx", state->Sysenter_cs,
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state->Sysenter_eip, state->Sysenter_esp);
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PLOG("%x", state->Intr_state);
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}
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#endif /* _VIRTUALBOX__SPEC__MUEN__VCPU_H_ */
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