59 lines
1.5 KiB
C++
59 lines
1.5 KiB
C++
/*
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* \brief Specific core implementations
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* \author Stefan Kalkowski
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* \author Josef Soentgen
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* \author Martin Stein
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* \date 2014-02-25
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*/
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/*
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* Copyright (C) 2014-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* core includes */
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#include <platform.h>
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#include <cpu.h>
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#include <base/internal/unmanaged_singleton.h>
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using namespace Genode;
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Memory_region_array & Platform::ram_regions()
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{
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return *unmanaged_singleton<Memory_region_array>(
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Memory_region { Board::RAM0_BASE, Board::RAM0_SIZE });
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}
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Memory_region_array & Platform::core_mmio_regions()
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{
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return *unmanaged_singleton<Memory_region_array>(
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Memory_region { Board::UART_1_MMIO_BASE, /* UART */
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Board::UART_1_MMIO_SIZE },
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Memory_region { Board::CORTEX_A9_PRIVATE_MEM_BASE, /* irq controller */
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Board::CORTEX_A9_PRIVATE_MEM_SIZE }, /* and timer */
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Memory_region { Board::PL310_MMIO_BASE, /* l2 cache controller */
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Board::PL310_MMIO_SIZE });
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}
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Genode::Arm::User_context::User_context() { cpsr = Psr::init_user(); }
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bool Cortex_a9::Board::errata(Cortex_a9::Board::Errata err)
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{
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switch (err) {
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case Cortex_a9::Board::ARM_754322:
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case Cortex_a9::Board::ARM_764369:
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case Cortex_a9::Board::ARM_775420:
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case Cortex_a9::Board::PL310_588369:
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case Cortex_a9::Board::PL310_727915:
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case Cortex_a9::Board::PL310_769419:
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return true;
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};
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return false;
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}
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