60 lines
1.7 KiB
C++
60 lines
1.7 KiB
C++
/*
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* \brief Platform implementations specific for RISC-V
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* \author Stefan Kalkowski
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* \author Sebastian Sumpf
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* \date 2016-11-23
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*/
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/*
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* Copyright (C) 2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#include <platform.h>
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Platform::Board::Board()
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: early_ram_regions(Genode::Memory_region { 0, 128 * 1024 * 1024 } ) {}
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struct Mstatus : Genode::Register<64>
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{
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enum {
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USER = 0,
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SUPERVISOR = 1,
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Sv39 = 9,
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};
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struct Ie : Bitfield<0, 1> { };
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struct Priv : Bitfield<1, 2> { };
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struct Ie1 : Bitfield<3, 1> { };
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struct Priv1 : Bitfield<4, 2> { };
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struct Fs : Bitfield<12, 2> { enum { INITIAL = 1 }; };
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struct Vm : Bitfield<17, 5> { };
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};
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void Platform::enable_mmu()
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{
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using Genode::Cpu;
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/* read status register */
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Mstatus::access_t mstatus = 0;
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Mstatus::Vm::set(mstatus, Mstatus::Sv39); /* enable Sv39 paging */
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Mstatus::Fs::set(mstatus, Mstatus::Fs::INITIAL); /* enable FPU */
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Mstatus::Ie1::set(mstatus, 1); /* user mode interrupt */
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Mstatus::Priv1::set(mstatus, Mstatus::USER); /* set user mode */
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Mstatus::Ie::set(mstatus, 0); /* disable interrupts */
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Mstatus::Priv::set(mstatus, Mstatus::SUPERVISOR); /* set supervisor mode */
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asm volatile ("csrw sasid, %0\n" /* address space id */
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"csrw sptbr, %1\n" /* set page table */
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"csrw mstatus, %2\n" /* change mode */
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:
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: "r" (0/*core_pd.asid*/),
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"r" (core_pd->table_base),
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"r" (mstatus)
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: "memory");
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}
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