cd3a5852d6
This commit enables compile-time warnings displayed whenever a deprecated API header is included, and adjusts the existing #include directives accordingly. Issue #1987
111 lines
3.0 KiB
C++
111 lines
3.0 KiB
C++
/*
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* \brief IOMUX controller register description
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* \author Stefan Kalkowski <stefan.kalkowski@genode-labs.com>
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* \date 2013-04-29
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*/
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/*
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* Copyright (C) 2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _DRIVERS__PLATFORM__SPEC__IMX53__IOMUX_H_
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#define _DRIVERS__PLATFORM__SPEC__IMX53__IOMUX_H_
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/* Genode includes */
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#include <util/mmio.h>
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#include <drivers/board_base.h>
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#include <base/attached_io_mem_dataspace.h>
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class Iomux : public Genode::Attached_io_mem_dataspace,
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Genode::Mmio
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{
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private:
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struct Gpr2 : Register<0x8,32>
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{
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struct Ch1_mode : Bitfield<2, 2> {
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enum { ROUTED_TO_DI1 = 0x3 }; };
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struct Data_width_ch1 : Bitfield<7, 1> {
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enum { PX_18_BITS, PX_24_BITS }; };
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struct Bit_mapping_ch1 : Bitfield<8, 1> {
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enum { SPWG, JEIDA }; };
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struct Di1_vs_polarity : Bitfield<10,1> { };
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};
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struct Key_col3 : Register<0x3c, 32> {};
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struct Key_row3 : Register<0x40, 32> {};
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struct Eim_a24 : Register<0x15c, 32> { };
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template <unsigned OFF>
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struct Sw_mux_ctl_pad_gpio : Register<0x314 + OFF*4, 32> { };
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struct Sw_pad_ctl_pad_key_col3 : Register<0x364, 32> { };
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struct Sw_pad_ctl_pad_key_row3 : Register<0x368, 32> { };
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struct Sw_pad_ctl_pad_eim_a24 : Register<0x4a8, 32> { };
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template <unsigned OFF>
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struct Sw_pad_ctl_pad_gpio : Register<0x6a4 + OFF*4, 32> { };
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struct I2c2_ipp_scl_in_select_input : Register<0x81c, 32> { };
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struct I2c2_ipp_sda_in_select_input : Register<0x820, 32> { };
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struct I2c3_ipp_scl_in_select_input : Register<0x824, 32> { };
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struct I2c3_ipp_sda_in_select_input : Register<0x828, 32> { };
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public:
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Iomux()
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: Genode::Attached_io_mem_dataspace(Genode::Board_base::IOMUXC_BASE,
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Genode::Board_base::IOMUXC_SIZE),
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Genode::Mmio((Genode::addr_t)local_addr<void>()) {
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}
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void i2c_2_enable()
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{
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write<Key_col3>(0x14);
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write<I2c2_ipp_scl_in_select_input>(0);
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write<Sw_pad_ctl_pad_key_col3>(0x12d);
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write<Key_row3>(0x14);
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write<I2c2_ipp_sda_in_select_input>(0);
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write<Sw_pad_ctl_pad_key_row3>(0x12d);
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}
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void i2c_3_enable()
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{
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write<Sw_mux_ctl_pad_gpio<3> >(0x12);
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write<I2c3_ipp_scl_in_select_input>(0x1);
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write<Sw_pad_ctl_pad_gpio<3> >(0x12d);
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write<Sw_mux_ctl_pad_gpio<4> >(0x12);
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write<I2c3_ipp_sda_in_select_input>(0x1);
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write<Sw_pad_ctl_pad_gpio<4> >(0x12d);
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}
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void ipu_enable()
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{
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write<Gpr2::Di1_vs_polarity>(1);
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write<Gpr2::Data_width_ch1>(Gpr2::Data_width_ch1::PX_18_BITS);
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write<Gpr2::Bit_mapping_ch1>(Gpr2::Bit_mapping_ch1::SPWG);
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write<Gpr2::Ch1_mode>(Gpr2::Ch1_mode::ROUTED_TO_DI1);
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}
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void pwm_enable()
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{
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write<Eim_a24>(1);
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write<Sw_pad_ctl_pad_eim_a24>(0);
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write<Sw_mux_ctl_pad_gpio<1> >(0x4);
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write<Sw_pad_ctl_pad_gpio<1> >(0x0);
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}
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void buttons_enable()
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{
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write<Eim_a24>(1);
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write<Sw_pad_ctl_pad_eim_a24>(0);
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}
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};
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#endif /* _DRIVERS__PLATFORM__SPEC__IMX53__IOMUX_H_ */
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