288fd4e56e
This patch extends the RAM session interface with the ability to allocate DMA buffers. The client specifies the type of RAM dataspace to allocate via the new 'cached' argument of the 'Ram_session::alloc()' function. By default, 'cached' is true, which correponds to the common case and the original behavior. When setting 'cached' to 'false', core takes the precautions needed to register the memory as uncached in the page table of each process that has the dataspace attached. Currently, the support for allocating DMA buffers is implemented for Fiasco.OC only. On x86 platforms, it is generally not needed. But on platforms with more relaxed cache coherence (such as ARM), user-level device drivers should always use uncacheable memory for DMA transactions.
147 lines
3.8 KiB
C++
147 lines
3.8 KiB
C++
/*
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* \brief Core-local mapping
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* \author Norman Feske
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* \author Stefan Kalkowski
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* \date 2010-02-15
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*/
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/*
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* Copyright (C) 2010-2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _CORE__INCLUDE__MAP_LOCAL_H_
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#define _CORE__INCLUDE__MAP_LOCAL_H_
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/* core includes */
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#include <platform.h>
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#include <util.h>
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/* Fiasco includes */
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namespace Fiasco {
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#include <l4/sys/ipc.h>
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#include <l4/sigma0/sigma0.h>
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#include <l4/sys/task.h>
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#include <l4/sys/cache.h>
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}
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namespace Genode {
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/**
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* Map pages locally within core
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*
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* On Fiasco, all mapping originate from virtual addresses. At startup,
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* core obtains the whole memory sigma0 in a one-to-one fashion. Hence,
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* core-local addresses normally correspond to physical addresses.
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*
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* \param from_addr core-virtual source address
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* \param to_addr core-virtual destination address
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* \param num_pages number of pages to remap
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*/
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inline bool map_local(addr_t from_addr, addr_t to_addr, size_t num_pages)
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{
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addr_t offset = 0;
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size_t page_size = get_page_size();
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size_t page_size_log2 = get_page_size_log2();
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for (unsigned i = 0; i < num_pages; i++, offset += page_size) {
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using namespace Fiasco;
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l4_fpage_t snd_fpage = l4_fpage(from_addr + offset,
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page_size_log2, L4_FPAGE_RW);
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if (l4_msgtag_has_error(l4_task_map(L4_BASE_TASK_CAP,
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L4_BASE_TASK_CAP,
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snd_fpage,
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to_addr + offset))) {
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PWRN("could not locally remap 0x%lx to 0x%lx", from_addr, to_addr);
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return false;
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}
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}
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return true;
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}
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static inline bool can_use_super_page(addr_t base, size_t size)
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{
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return (base & (get_super_page_size() - 1)) == 0
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&& (size >= get_super_page_size());
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}
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/**
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* Map memory-mapped I/O range within core
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*
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* \return true on success
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*/
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static inline bool map_local_io(addr_t from_addr, addr_t to_addr,
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size_t num_pages)
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{
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using namespace Fiasco;
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size_t size = num_pages << get_page_size_log2();
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/* call sigma0 for I/O region */
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unsigned offset = 0;
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while (size) {
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/* FIXME what about caching demands? */
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/* FIXME what about read / write? */
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l4_utcb_mr()->mr[0] = SIGMA0_REQ_FPAGE_IOMEM;
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size_t page_size_log2 = get_page_size_log2();
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if (can_use_super_page(from_addr + offset, size))
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page_size_log2 = get_super_page_size_log2();
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l4_utcb_mr()->mr[1] = l4_fpage(from_addr + offset,
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page_size_log2, L4_FPAGE_RWX).raw;
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/* open receive window for mapping */
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l4_utcb_br()->bdr = 0;
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l4_utcb_br()->br[0] = L4_ITEM_MAP;
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l4_utcb_br()->br[1] = l4_fpage((addr_t)to_addr + offset,
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page_size_log2, L4_FPAGE_RWX).raw;
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l4_msgtag_t tag = l4_msgtag(L4_PROTO_SIGMA0, 2, 0, 0);
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tag = l4_ipc_call(L4_BASE_PAGER_CAP, l4_utcb(), tag, L4_IPC_NEVER);
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if (l4_ipc_error(tag, l4_utcb())) {
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PERR("Ipc error %ld", l4_ipc_error(tag, l4_utcb()));
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return false;
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}
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if (l4_msgtag_items(tag) < 1) {
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PERR("Got no mapping!");
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return false;
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}
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offset += 1 << page_size_log2;
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size -= 1 << page_size_log2;
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}
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return true;
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}
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static inline void unmap_local(addr_t local_base, size_t num_pages)
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{
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using namespace Fiasco;
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size_t size = num_pages << get_page_size_log2();
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addr_t addr = local_base;
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/*
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* XXX divide operation into flexpages greater than page size
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*/
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for (; addr < local_base + size; addr += L4_PAGESIZE)
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l4_task_unmap(L4_BASE_TASK_CAP,
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l4_fpage(addr, L4_LOG2_PAGESIZE, L4_FPAGE_RW),
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L4_FP_OTHER_SPACES);
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l4_cache_clean_data(local_base, local_base + size);
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}
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}
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#endif /* _CORE__INCLUDE__MAP_LOCAL_H_ */
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