144 lines
3.0 KiB
C++
144 lines
3.0 KiB
C++
/*
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* \brief CPU driver for core
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* \author Martin stein
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* \author Stefan Kalkowski
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* \date 2011-11-03
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*/
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/*
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* Copyright (C) 2011-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _SPEC__CORTEX_A9__CPU_SUPPORT_H_
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#define _SPEC__CORTEX_A9__CPU_SUPPORT_H_
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/* core includes */
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#include <spec/arm/fpu.h>
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#include <spec/arm_v7/cpu_support.h>
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#include <board.h>
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namespace Genode { class Cortex_a9; }
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class Genode::Cortex_a9 : public Arm_v7
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{
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protected:
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Fpu _fpu;
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public:
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/**
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* Coprocessor Access Control Register
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*/
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struct Cpacr : Register<32>
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{
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struct Cp10 : Bitfield<20, 2> { };
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struct Cp11 : Bitfield<22, 2> { };
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/**
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* Read register value
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*/
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static access_t read()
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{
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access_t v;
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asm volatile ("mrc p15, 0, %[v], c1, c0, 2" : [v]"=r"(v) ::);
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return v;
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}
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/**
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* Override register value
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*
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* \param v write value
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*/
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static void write(access_t const v) {
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asm volatile ("mcr p15, 0, %[v], c1, c0, 2" :: [v]"r"(v) :); }
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};
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/**
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* Auxiliary Control Register
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*/
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struct Actlr : Register<32>
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{
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struct Smp : Bitfield<6, 1> { };
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static access_t read()
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{
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access_t v;
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asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (v) :: );
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return v;
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}
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static void write(access_t const v) {
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asm volatile ("mcr p15, 0, %0, c1, c0, 1" :: "r" (v) : ); }
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static void enable_smp()
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{
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access_t v = read();
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Smp::set(v, 1);
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write(v);
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}
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};
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struct User_context : Arm::User_context, Fpu::Context { };
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/**
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* Next cpu context to switch to
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*
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* \param context context to switch to
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*/
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void switch_to(User_context & context) { _fpu.switch_to(context); }
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/**
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* Return wether to retry an undefined user instruction after this call
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*
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* \param state CPU state of the user
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*/
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bool retry_undefined_instr(User_context & context) {
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return _fpu.fault(context); }
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/**
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* Write back dirty cache lines and invalidate whole data cache
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*/
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void clean_invalidate_data_cache()
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{
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clean_invalidate_inner_data_cache();
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Kernel::board().l2_cache().clean_invalidate();
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}
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/**
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* Invalidate whole data cache
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*/
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void invalidate_data_cache()
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{
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invalidate_inner_data_cache();
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Kernel::board().l2_cache().invalidate();
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}
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/**
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* Clean and invalidate data-cache for virtual region
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* 'base' - 'base + size'
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*/
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void clean_invalidate_data_cache_by_virt_region(addr_t base,
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size_t const size)
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{
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Arm::clean_invalidate_data_cache_by_virt_region(base, size);
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Kernel::board().l2_cache().clean_invalidate();
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}
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void translation_table_insertions() { invalidate_branch_predicts(); }
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static unsigned executing_id() { return Mpidr::Aff_0::get(Mpidr::read()); }
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/*************
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** Dummies **
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*************/
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static void translation_added(addr_t, size_t) { }
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};
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#endif /* _SPEC__CORTEX_A9__CPU_SUPPORT_H_ */
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