1668983efa
This commit adds rocket core on the Zynq FPGA support to base HW. It also takes advantage of the new timer infrastructure introduced with the privileged 1.8 and adds improved TLB flush support. fixes #1880
54 lines
983 B
C++
54 lines
983 B
C++
/*
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* \brief Serial output driver for core
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* \author Sebastian Sumpf
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* \date 2015-06-02
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*/
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/*
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* Copyright (C) 2015-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _SERIAL_H_
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#define _SERIAL_H_
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/* Genode includes */
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#include <base/stdint.h>
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#include <util/register.h>
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/* core includes */
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#include <machine_call.h>
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namespace Genode { class Serial; }
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/**
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* Serial output driver for core
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*/
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class Genode::Serial
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{
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public:
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/**
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* Constructor
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*/
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Serial(unsigned) { }
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void put_char(char const c)
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{
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struct Arg : Register<64>
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{
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struct Char : Bitfield<0, 8> { };
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struct Write_cmd : Bitfield<48, 1> { };
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struct Stdout : Bitfield<56, 1> { };
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};
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Machine::put_char(Arg::Char::bits(c) |
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Arg::Stdout::bits(1) |
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Arg::Write_cmd::bits(1));
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}
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};
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#endif /* _SERIAL_H_ */
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