4e97a6511b
* Instead of always re-load page-tables when a thread context is switched only do this when another user PD's thread is the next target, core-threads are always executed within the last PD's page-table set * remove the concept of the mode transition * instead map the exception vector once in bootstrap code into kernel's memory segment * when a new page directory is constructed for a user PD, copy over the top-level kernel segment entries on RISCV and X86, on ARM we use a designated page directory register for the kernel segment * transfer the current CPU id from bootstrap to core/kernel in a register to ease first stack address calculation * align cpu context member of threads and vms, because of x86 constraints regarding the stack-pointer loading * introduce Align_at template for members with alignment constraints * let the x86 hardware do part of the context saving in ISS, by passing the thread context into the TSS before leaving to user-land * use one exception vector for all ARM platforms including Arm_v6 Fix #2091
31 lines
702 B
C++
31 lines
702 B
C++
/*
|
|
* \brief Initialization code for bootstrap
|
|
* \author Stefan Kalkowski
|
|
* \date 2016-09-22
|
|
*/
|
|
|
|
/*
|
|
* Copyright (C) 2016-2017 Genode Labs GmbH
|
|
*
|
|
* This file is part of the Genode OS framework, which is distributed
|
|
* under the terms of the GNU Affero General Public License version 3.
|
|
*/
|
|
|
|
/* local */
|
|
#include <platform.h>
|
|
|
|
/* base includes */
|
|
#include <base/internal/globals.h>
|
|
#include <base/internal/unmanaged_singleton.h>
|
|
|
|
Bootstrap::Platform & Bootstrap::platform() {
|
|
return *unmanaged_singleton<Bootstrap::Platform>(); }
|
|
|
|
extern "C" void init() __attribute__ ((noreturn));
|
|
|
|
extern "C" void init()
|
|
{
|
|
Bootstrap::Platform & p = Bootstrap::platform();
|
|
p.start_core(p.enable_mmu());
|
|
}
|