494 lines
12 KiB
C++
494 lines
12 KiB
C++
/*
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* \brief Fiasco platform interface implementation
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* \author Christian Helmuth
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* \date 2006-04-11
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*/
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/*
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* Copyright (C) 2006-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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/* Genode includes */
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#include <base/log.h>
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#include <base/allocator_avl.h>
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#include <base/sleep.h>
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#include <util/misc_math.h>
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/* base-internal includes */
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#include <base/internal/crt0.h>
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#include <base/internal/fiasco_thread_helper.h>
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#include <base/internal/stack_area.h>
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#include <base/internal/capability_space_tpl.h>
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#include <base/internal/globals.h>
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/* core includes */
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#include <core_log.h>
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#include <platform.h>
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#include <platform_thread.h>
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#include <platform_pd.h>
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#include <util.h>
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/* Fiasco includes */
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namespace Fiasco {
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#include <l4/sys/types.h>
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#include <l4/sys/syscalls.h>
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#include <l4/sys/ipc.h>
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#include <l4/sys/kernel.h>
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#include <l4/sys/kip.h>
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#include <l4/sigma0/sigma0.h>
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}
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using namespace Genode;
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/***********************************
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** Core address space management **
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***********************************/
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static Synced_range_allocator<Allocator_avl> &_core_address_ranges()
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{
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static Synced_range_allocator<Allocator_avl> _core_address_ranges(nullptr);
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return _core_address_ranges;
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}
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enum { PAGER_STACK_ELEMENTS = 1024 };
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static unsigned long _core_pager_stack[PAGER_STACK_ELEMENTS];
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static unsigned _core_pager_arg;
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/**
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* Core pager "service loop"
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*/
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static void _core_pager_loop()
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{
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unsigned pd_id = _core_pager_arg;
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using namespace Fiasco;
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l4_threadid_t t;
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l4_umword_t dw0, dw1;
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l4_msgdope_t r;
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bool send_reply = false;
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while (1) {
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if (send_reply)
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/* unblock faulter and wait for next pagefault */
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l4_ipc_reply_and_wait(t, L4_IPC_SHORT_MSG, 0, 0,
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&t, L4_IPC_SHORT_MSG, &dw0, &dw1,
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L4_IPC_NEVER, &r);
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else
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l4_ipc_wait(&t, L4_IPC_SHORT_MSG, &dw0, &dw1, L4_IPC_NEVER, &r);
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/* ignore messages from non-core pds */
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if (t.id.task != pd_id) break;
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/* detect local map request */
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if (dw1 == 0) {
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l4_msgdope_t ipc_result;
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l4_ipc_send(t, L4_IPC_SHORT_FPAGE, 0, dw0,
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L4_IPC_SEND_TIMEOUT_0, &ipc_result);
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send_reply = false;
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continue;
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}
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bool rw = dw0 & 2;
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addr_t pfa = dw0 & ~2;
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if (pfa < L4_PAGESIZE) {
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/* NULL pointer access */
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error("possible null pointer ", rw ? "WRITE" : "READ", " "
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"in ", (int)t.id.task, ".", (int)t.id.lthread, " "
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"at ", Hex(pfa), " IP ", Hex(dw1));
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/* do not unblock faulter */
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send_reply = false;
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continue;
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} else if (!_core_address_ranges().valid_addr(pfa)) {
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/* page-fault address is not in RAM */
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error(rw ? "WRITE" : "READ", " access outside of RAM "
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"in ", (int)t.id.task, ".", (int)t.id.lthread, " "
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"at ", Hex(pfa), " IP ", Hex(dw1));
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/* do not unblock faulter */
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send_reply = false;
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continue;
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}
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/* my pf handler is sigma0 - just touch the appropriate page */
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if (rw)
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touch_rw((void *)pfa, 1);
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else
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touch_ro((void *)pfa, 1);
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send_reply = true;
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}
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}
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Platform::Sigma0::Sigma0()
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:
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Pager_object(Cpu_session_capability(), Thread_capability(),
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0, Affinity::Location(), Session_label(),
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Cpu_session::Name("sigma0"))
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{
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cap(Capability_space::import(Fiasco::sigma0_threadid, Rpc_obj_key()));
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}
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Platform::Sigma0 &Platform::sigma0()
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{
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static Sigma0 _sigma0;
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return _sigma0;
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}
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Platform::Core_pager::Core_pager(Platform_pd &core_pd)
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:
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Platform_thread("core.pager"),
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Pager_object(Cpu_session_capability(), Thread_capability(),
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0, Affinity::Location(), Session_label(),
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Cpu_session::Name(name()))
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{
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Platform_thread::pager(sigma0());
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core_pd.bind_thread(*this);
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cap(Capability_space::import(native_thread_id(), Rpc_obj_key()));
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/* pager needs to know core's pd ID */
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_core_pager_arg = core_pd.pd_id();
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/* stack begins at the top end of the '_core_pager_stack' array */
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void *sp = (void *)&_core_pager_stack[PAGER_STACK_ELEMENTS - 1];
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start((void *)_core_pager_loop, sp);
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using namespace Fiasco;
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/* pager0 receives pagefaults from me - for NULL pointer detection */
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l4_umword_t d;
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l4_threadid_t preempter = L4_INVALID_ID;
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l4_threadid_t pager = native_thread_id();
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l4_thread_ex_regs(l4_myself(), ~0UL, ~0UL, &preempter, &pager, &d, &d, &d);
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}
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Platform::Core_pager &Platform::core_pager()
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{
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static Core_pager _core_pager(core_pd());
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return _core_pager;
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}
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/***********************************
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** Helper for L4 region handling **
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***********************************/
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struct Region
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{
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addr_t start;
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addr_t end;
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Region() : start(0), end(0) { }
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Region(addr_t s, addr_t e) : start(s), end(e) { }
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/**
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* Returns true if the specified range intersects with the region
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*/
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bool intersects(addr_t base, size_t size) const
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{
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return (((base + size) > start) && (base < end));
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}
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};
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/**
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* Add region to allocator
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*/
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static inline void add_region(Region r, Range_allocator &alloc)
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{
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/* adjust region */
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addr_t start = trunc_page(r.start);
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addr_t end = round_page(r.end);
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alloc.add_range(start, end - start);
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}
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/**
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* Remove region from allocator
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*/
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static inline void remove_region(Region r, Range_allocator &alloc)
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{
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/* adjust region */
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addr_t start = trunc_page(r.start);
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addr_t end = round_page(r.end);
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alloc.remove_range(start, end - start);
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}
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/**
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* Request any RAM page from Sigma0
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*/
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static inline int sigma0_req_region(addr_t *addr, unsigned log2size)
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{
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using namespace Fiasco;
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/* XXX sigma0 always maps pages RW */
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l4_umword_t req_fpage = l4_fpage(0, log2size, 0, 0).fpage;
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void* rcv_window = L4_IPC_MAPMSG(0, L4_WHOLE_ADDRESS_SPACE);
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addr_t base;
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l4_fpage_t rcv_fpage;
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l4_msgdope_t result;
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l4_msgtag_t tag;
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int err = l4_ipc_call_tag(Fiasco::sigma0_threadid,
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L4_IPC_SHORT_MSG, SIGMA0_REQ_FPAGE_ANY, req_fpage,
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l4_msgtag(L4_MSGTAG_SIGMA0, 0, 0, 0),
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rcv_window, &base, (l4_umword_t *)&rcv_fpage,
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L4_IPC_NEVER, &result, &tag);
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int ret = (err || !l4_ipc_fpage_received(result));
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if (!ret) touch_rw((void *)addr, 1);
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*addr = base;
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return ret;
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}
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void Platform::_setup_mem_alloc()
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{
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/*
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* Completely map program image by touching all pages read-only to
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* prevent sigma0 from handing out those page as anonymous memory.
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*/
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volatile const char *beg, *end;
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beg = (const char *)(((unsigned)&_prog_img_beg) & L4_PAGEMASK);
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end = (const char *)&_prog_img_end;
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for ( ; beg < end; beg += L4_PAGESIZE) (void)(*beg);
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/* request pages of known page size starting with largest */
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size_t log2_sizes[] = { L4_LOG2_SUPERPAGESIZE, L4_LOG2_PAGESIZE };
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for (unsigned i = 0; i < sizeof(log2_sizes)/sizeof(*log2_sizes); ++i) {
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size_t log2_size = log2_sizes[i];
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size_t size = 1 << log2_size;
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int err = 0;
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addr_t addr;
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Region region;
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/* request any page of current size from sigma0 */
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do {
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err = sigma0_req_region(&addr, log2_size);
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if (!err) {
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/* XXX do not allocate page0 */
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if (addr == 0) {
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Fiasco::l4_fpage_unmap(Fiasco::l4_fpage(0, log2_size, 0, 0),
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L4_FP_FLUSH_PAGE | L4_FP_ALL_SPACES);
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continue;
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}
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region.start = addr; region.end = addr + size;
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if (!region.intersects(stack_area_virtual_base(),
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stack_area_virtual_size())) {
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add_region(region, _ram_alloc);
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add_region(region, _core_address_ranges());
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}
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remove_region(region, _io_mem_alloc);
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remove_region(region, _region_alloc);
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}
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} while (!err);
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}
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}
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void Platform::_setup_irq_alloc() {
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_irq_alloc.add_range(0, 0x10); }
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static Fiasco::l4_kernel_info_t *get_kip()
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{
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using namespace Fiasco;
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static l4_kernel_info_t *kip = nullptr;
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if (kip) return kip;
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int err;
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/* region allocator is not setup yet */
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/* map KIP one-to-one */
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void *fpage = L4_IPC_MAPMSG(0, L4_WHOLE_ADDRESS_SPACE);
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l4_umword_t dw0, dw1;
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l4_msgdope_t r;
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l4_msgtag_t tag;
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err = l4_ipc_call_tag(Fiasco::sigma0_threadid,
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L4_IPC_SHORT_MSG, SIGMA0_REQ_KIP, 0,
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l4_msgtag(L4_MSGTAG_SIGMA0, 0, 0, 0),
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fpage, &dw0, &dw1,
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L4_IPC_NEVER, &r, &tag);
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bool amok = false;
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if (err) {
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raw("IPC error ", err, " while accessing the KIP");
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amok = true;
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}
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if (!l4_ipc_fpage_received(r)) {
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warning("No fpage received");
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amok = true;
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}
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if (amok)
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panic("kip mapping failed");
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/* store mapping base from received mapping */
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kip = (l4_kernel_info_t *)dw0;
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if (kip->magic != L4_KERNEL_INFO_MAGIC)
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panic("Sigma0 mapped something but not the KIP");
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return kip;
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}
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void Platform::_setup_basics()
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{
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using namespace Fiasco;
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l4_kernel_info_t * kip = get_kip();
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/* add KIP as ROM module */
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_rom_fs.insert(&_kip_rom);
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/* parse memory descriptors - look for virtual memory configuration */
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/* XXX we support only one VM region (here and also inside RM) */
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using L4::Kip::Mem_desc;
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_vm_start = 0; _vm_size = 0;
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Mem_desc *desc = Mem_desc::first(kip);
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for (unsigned i = 0; i < Mem_desc::count(kip); ++i)
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if (desc[i].is_virtual()) {
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_vm_start = round_page(desc[i].start());
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_vm_size = trunc_page(desc[i].end() - _vm_start + 1);
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break;
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}
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if (_vm_size == 0)
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panic("Virtual memory configuration not found");
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/* configure applicable address space but never use page0 */
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_vm_size = _vm_start == 0 ? _vm_size - L4_PAGESIZE : _vm_size;
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_vm_start = _vm_start == 0 ? L4_PAGESIZE : _vm_start;
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_region_alloc.add_range(_vm_start, _vm_size);
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/* preserve stack area in core's virtual address space */
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_region_alloc.remove_range(stack_area_virtual_base(),
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stack_area_virtual_size());
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/* I/O memory could be the whole user address space */
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/* FIXME if the kernel helps to find out max address - use info here */
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_io_mem_alloc.add_range(0, ~0);
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/* remove KIP area from region and IO_MEM allocator */
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remove_region(Region((addr_t)kip, (addr_t)kip + L4_PAGESIZE), _region_alloc);
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remove_region(Region((addr_t)kip, (addr_t)kip + L4_PAGESIZE), _io_mem_alloc);
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/* remove core program image memory from region and IO_MEM allocator */
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addr_t img_start = (addr_t) &_prog_img_beg;
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addr_t img_end = (addr_t) &_prog_img_end;
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remove_region(Region(img_start, img_end), _region_alloc);
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remove_region(Region(img_start, img_end), _io_mem_alloc);
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/* image is accessible by core */
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add_region(Region(img_start, img_end), _core_address_ranges());
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}
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Platform::Platform() :
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_ram_alloc(nullptr), _io_mem_alloc(&core_mem_alloc()),
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_io_port_alloc(&core_mem_alloc()), _irq_alloc(&core_mem_alloc()),
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_region_alloc(&core_mem_alloc()),
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_kip_rom((addr_t)get_kip(), L4_PAGESIZE, "l4v2_kip")
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{
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/*
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* We must be single-threaded at this stage and so this is safe.
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*/
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static bool initialized = 0;
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if (initialized) panic("Platform constructed twice!");
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initialized = true;
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_setup_basics();
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_setup_mem_alloc();
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_setup_io_port_alloc();
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_setup_irq_alloc();
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_init_rom_modules();
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log(_rom_fs);
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Fiasco::l4_threadid_t myself = Fiasco::l4_myself();
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Platform_pd::init();
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/* setup pd object for core pd */
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_core_label[0] = 0;
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_core_pd = new (core_mem_alloc()) Platform_pd(_core_label, myself.id.task);
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/*
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* We setup the thread object for thread0 in core pd using a special
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* interface that allows us to specify the lthread number.
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*/
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Platform_thread &core_thread = *new (core_mem_alloc())
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Platform_thread("core.main");
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core_thread.pager(sigma0());
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_core_pd->bind_thread(core_thread);
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/* we never call _core_thread.start(), so set name directly */
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Fiasco::fiasco_register_thread_name(core_thread.native_thread_id(),
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core_thread.name().string());
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/* core log as ROM module */
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{
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void * phys_ptr = nullptr;
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unsigned const pages = 1;
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size_t const log_size = pages << get_page_size_log2();
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ram_alloc().alloc_aligned(log_size, &phys_ptr, get_page_size_log2());
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addr_t const phys_addr = reinterpret_cast<addr_t>(phys_ptr);
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void * const core_local_ptr = phys_ptr;
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addr_t const core_local_addr = phys_addr;
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/* let one page free after the log buffer */
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region_alloc().remove_range(core_local_addr, log_size + get_page_size());
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memset(core_local_ptr, 0, log_size);
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_rom_fs.insert(new (core_mem_alloc()) Rom_module(phys_addr, log_size,
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"core_log"));
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init_core_log(Core_log_range { core_local_addr, log_size } );
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}
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}
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/********************************
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** Generic platform interface **
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********************************/
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void Platform::wait_for_exit()
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{
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/*
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* On Fiasco, Core never exits. So let us sleep forever.
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*/
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sleep_forever();
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}
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