310 lines
6.3 KiB
C++
310 lines
6.3 KiB
C++
/*
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* \brief EHCI for OMAP4
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* \author Sebastian Sumpf <sebastian.sumpf@genode-labs.com>
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* \date 2012-06-20
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*/
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/*
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* Copyright (C) 2012-2017 Genode Labs GmbH
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*
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* This file is distributed under the terms of the GNU General Public License
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* version 2.
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*/
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#include <platform.h>
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#include <drivers/defs/panda.h>
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#include <gpio_session/connection.h>
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#include <io_mem_session/connection.h>
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#include <util/mmio.h>
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#include <lx_emul.h>
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#include <linux/platform_data/usb-omap.h>
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using namespace Genode;
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/**
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* Base addresses
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*/
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enum {
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EHCI_BASE = 0x4a064c00,
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UHH_BASE = 0x4a064000,
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TLL_BASE = 0x4a062000,
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SCRM_BASE = 0x4a30a000,
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CAM_BASE = 0x4a009000, /* used for L3INIT_CM2 */
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};
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/**
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* Inerrupt numbers
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*/
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enum { IRQ_EHCI = Panda::HSUSB_EHCI_IRQ };
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/**
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* Resources for platform device
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*/
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static resource _ehci[] =
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{
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{ EHCI_BASE, EHCI_BASE + 0x400 - 1, "ehci", IORESOURCE_MEM },
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{ IRQ_EHCI, IRQ_EHCI, "ehci-irq", IORESOURCE_IRQ },
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};
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/**
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* Port informations for platform device
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*/
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static struct ehci_hcd_omap_platform_data _ehci_data;
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/**
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* Enables USB clocks
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*/
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struct Clocks : Genode::Mmio
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{
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Clocks(Genode::addr_t const mmio_base) : Mmio(mmio_base)
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{
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write<Usb_phy_clk>(0x101);
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write<Usb_host_clk>(0x1008002);
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write<Usb_tll_clk>(0x1);
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}
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struct Usb_host_clk : Register<0x358, 32> { };
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struct Usb_tll_clk : Register<0x368, 32> { };
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struct Usb_phy_clk : Register<0x3e0, 32> { };
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template <typename T> void update(unsigned val)
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{
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typename T::access_t access = read<T>();
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access |= val;
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write<T>(access);
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};
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void dump()
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{
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Usb_host_clk::access_t a1 = read<Usb_host_clk>();
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Usb_tll_clk::access_t a3 = read<Usb_tll_clk>();
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Usb_phy_clk::access_t a4 = read<Usb_phy_clk>();
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}
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};
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/**
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* Panda board reference USB clock
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*/
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struct Aux3 : Genode::Mmio
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{
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Aux3(addr_t const mmio_base) : Mmio(mmio_base)
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{
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enable();
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}
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/* the clock register */
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struct Aux3_clk : Register<0x31c, 32>
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{
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struct Src_select : Bitfield<1, 2> { };
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struct Div : Bitfield<16, 4> { enum { DIV_2 = 1 }; };
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struct Enable : Bitfield<8, 1> { enum { ON = 1 }; };
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};
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/* clock source register */
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struct Aux_src : Register<0x110, 32, true> { };
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void enable()
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{
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/* select system clock */
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write<Aux3_clk::Src_select>(0);
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/* set to 19.2 Mhz */
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write<Aux3_clk::Div>(Aux3_clk::Div::DIV_2);
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/* enable clock */
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write<Aux3_clk::Enable>(Aux3_clk::Enable::ON);
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/* enable_ext = 1 | enable_int = 1| mode = 0x01 */
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write<Aux_src>(0xd);
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}
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};
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/**
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* ULPI transceiverless link
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*/
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struct Tll : Genode::Mmio
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{
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Tll(addr_t const mmio_base) : Mmio(mmio_base)
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{
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reset();
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}
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struct Sys_config : Register<0x10, 32>
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{
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struct Soft_reset : Bitfield<1, 1> { };
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struct Cactivity : Bitfield<8, 1> { };
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struct Sidle_mode : Bitfield<3, 2> { };
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struct Ena_wakeup : Bitfield<2, 1> { };
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};
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struct Sys_status : Register<0x14, 32> { };
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void reset()
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{
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write<Sys_config>(0x0);
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/* reset */
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write<Sys_config::Soft_reset>(0x1);
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while(!read<Sys_status>())
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msleep(1);
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/* disable IDLE, enable wake up, enable auto gating */
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write<Sys_config::Cactivity>(1);
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write<Sys_config::Sidle_mode>(1);
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write<Sys_config::Ena_wakeup>(1);
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}
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};
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/**
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* USB high-speed host
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*/
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struct Uhh : Genode::Mmio
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{
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Uhh(addr_t const mmio_base) : Mmio(mmio_base)
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{
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/* diable idle and standby */
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write<Sys_config::Idle>(1);
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write<Sys_config::Standby>(1);
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/* set ports to external phy */
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write<Host_config::P1_mode>(0);
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write<Host_config::P2_mode>(0);
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}
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struct Sys_config : Register<0x10, 32>
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{
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struct Idle : Bitfield<2, 2> { };
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struct Standby : Bitfield<4, 2> { };
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};
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struct Host_config : Register<0x40, 32>
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{
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struct P1_mode : Bitfield<16, 2> { };
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struct P2_mode : Bitfield<18, 2> { };
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};
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};
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/**
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* EHCI controller
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*/
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struct Ehci : Genode::Mmio
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{
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Ehci(addr_t const mmio_base) : Mmio(mmio_base)
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{
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write<Cmd>(0);
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/* reset */
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write<Cmd::Reset>(1);
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while(read<Cmd::Reset>())
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msleep(1);
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}
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struct Cmd : Register<0x10, 32>
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{
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struct Reset : Bitfield<1, 1> { };
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};
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};
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/**
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* Initialize the USB controller from scratch, since the boot loader might not
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* do it or even disable USB.
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*/
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static void omap_ehci_init(Genode::Env &env)
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{
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/* taken from the Panda board manual */
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enum { HUB_POWER = 1, HUB_NRESET = 62, ULPI_PHY_TYPE = 182 };
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/* SCRM */
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Io_mem_connection io_scrm(env, SCRM_BASE, 0x1000);
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addr_t scrm_base = (addr_t)env.rm().attach(io_scrm.dataspace());
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/* enable reference clock */
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Aux3 aux3(scrm_base);
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/* init GPIO */
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Gpio::Connection gpio_power(env, HUB_POWER);
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Gpio::Connection gpio_reset(env, HUB_NRESET);
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/* disable the hub power and reset before init */
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gpio_power.direction(Gpio::Session::OUT);
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gpio_reset.direction(Gpio::Session::OUT);
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gpio_power.write(false);
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gpio_reset.write(true);
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/* enable clocks */
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Io_mem_connection io_clock(env, CAM_BASE, 0x1000);
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addr_t clock_base = (addr_t)env.rm().attach(io_clock.dataspace());
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Clocks c(clock_base);
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/* reset TLL */
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Io_mem_connection io_tll(env, TLL_BASE, 0x1000);
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addr_t tll_base = (addr_t)env.rm().attach(io_tll.dataspace());
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Tll t(tll_base);
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/* reset host */
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Io_mem_connection io_uhh(env, UHH_BASE, 0x1000);
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addr_t uhh_base = (addr_t)env.rm().attach(io_uhh.dataspace());
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Uhh uhh(uhh_base);
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/* enable hub power */
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gpio_power.write(true);
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/* reset EHCI */
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addr_t ehci_base = uhh_base + 0xc00;
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Ehci ehci(ehci_base);
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addr_t base[] = { scrm_base, clock_base, tll_base, uhh_base, 0 };
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for (int i = 0; base[i]; i++)
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env.rm().detach(base[i]);
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}
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extern "C" void module_ehci_omap_init();
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extern "C" int module_usbnet_init();
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extern "C" int module_smsc95xx_driver_init();
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void platform_hcd_init(Services *services)
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{
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/* register EHCI controller */
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module_ehci_omap_init();
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/* initialize EHCI */
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omap_ehci_init(services->env);
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/* setup EHCI-controller platform device */
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platform_device *pdev = (platform_device *)kzalloc(sizeof(platform_device), 0);
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pdev->name = (char *)"ehci-omap";
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pdev->id = 0;
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pdev->num_resources = 2;
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pdev->resource = _ehci;
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_ehci_data.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY;
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_ehci_data.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED;
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_ehci_data.phy_reset = 0;
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pdev->dev.platform_data = &_ehci_data;
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/*
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* Needed for DMA buffer allocation. See 'hcd_buffer_alloc' in 'buffer.c'
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*/
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static u64 dma_mask = ~(u64)0;
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pdev->dev.dma_mask = &dma_mask;
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pdev->dev.coherent_dma_mask = ~0;
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platform_device_register(pdev);
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}
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