171 lines
3.2 KiB
C++
171 lines
3.2 KiB
C++
/*
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* \brief CPU context of a virtual machine for x86
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* \author Alexander Boettcher
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* \date 2018-10-09
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*/
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/*
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* Copyright (C) 2018 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__SPEC__X86__CPU__VM_STATE_H_
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#define _INCLUDE__SPEC__X86__CPU__VM_STATE_H_
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#include <base/stdint.h>
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namespace Genode
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{
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struct Vm_state;
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}
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struct Genode::Vm_state
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{
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template <typename T>
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class Register
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{
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private:
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bool _valid;
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T _value { };
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public:
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Register() : _valid(false) { }
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Register(T value) : _valid(true), _value(value) { }
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T value() const { return _value; }
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void value(T value) { _value = value; _valid = true; }
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bool valid() const { return _valid; }
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void invalid() { _valid = false; }
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Register &operator = (Register const &other)
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{
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_valid = other._valid;
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/* keep original _value if other._valid is not valid */
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if (_valid)
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_value = other._value;
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return *this;
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}
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};
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struct Range {
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addr_t base;
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uint32_t limit;
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};
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struct Segment {
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uint16_t sel, ar;
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uint32_t limit;
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addr_t base;
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};
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Register<addr_t> ax;
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Register<addr_t> cx;
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Register<addr_t> dx;
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Register<addr_t> bx;
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Register<addr_t> bp;
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Register<addr_t> si;
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Register<addr_t> di;
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Register<addr_t> sp;
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Register<addr_t> ip;
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Register<addr_t> ip_len;
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Register<addr_t> flags;
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Register<Segment> es;
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Register<Segment> ds;
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Register<Segment> fs;
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Register<Segment> gs;
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Register<Segment> cs;
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Register<Segment> ss;
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Register<Segment> tr;
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Register<Segment> ldtr;
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Register<Range> gdtr;
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Register<Range> idtr;
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Register<addr_t> cr0;
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Register<addr_t> cr2;
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Register<addr_t> cr3;
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Register<addr_t> cr4;
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Register<addr_t> dr7;
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Register<addr_t> sysenter_ip;
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Register<addr_t> sysenter_sp;
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Register<addr_t> sysenter_cs;
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Register<uint64_t> qual_primary;
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Register<uint64_t> qual_secondary;
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Register<uint32_t> ctrl_primary;
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Register<uint32_t> ctrl_secondary;
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Register<uint32_t> inj_info;
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Register<uint32_t> inj_error;
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Register<uint32_t> intr_state;
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Register<uint32_t> actv_state;
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Register<uint64_t> tsc;
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Register<uint64_t> tsc_offset;
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Register<addr_t> efer;
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Register<uint64_t> pdpte_0;
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Register<uint64_t> pdpte_1;
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Register<uint64_t> pdpte_2;
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Register<uint64_t> pdpte_3;
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Register<uint64_t> r8;
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Register<uint64_t> r9;
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Register<uint64_t> r10;
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Register<uint64_t> r11;
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Register<uint64_t> r12;
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Register<uint64_t> r13;
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Register<uint64_t> r14;
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Register<uint64_t> r15;
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Register<uint64_t> star;
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Register<uint64_t> lstar;
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Register<uint64_t> fmask;
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Register<uint64_t> kernel_gs_base;
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Register<uint32_t> tpr;
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Register<uint32_t> tpr_threshold;
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unsigned exit_reason;
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class Fpu {
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private :
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uint8_t _value[512] { };
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bool _valid { false };
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public:
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bool valid() const { return _valid; }
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void invalid() { _valid = false; }
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template <typename FUNC>
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void value(FUNC const &fn) {
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_valid = true;
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fn(_value, sizeof(_value));
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};
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Fpu &operator = (Fpu const &)
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{
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_valid = false;
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return *this;
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}
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} fpu __attribute__((aligned(16)));
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};
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#endif /* _INCLUDE__SPEC__X86__CPU__VM_STATE_H_ */
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