171 lines
3.4 KiB
C++
171 lines
3.4 KiB
C++
/*
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* \brief EHCI for Arndale initializaion code
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* \author Sebastian Sumpf
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* \date 2013-02-20
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*/
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/*
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* Copyright (C) 2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode */
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#include <io_mem_session/connection.h>
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#include <util/mmio.h>
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/* Emulation */
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#include <platform/platform.h>
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#include <lx_emul.h>
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/* Linux */
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#include <plat/ehci.h>
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using namespace Genode;
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enum {
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EHCI_BASE = 0x12110000,
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GPIO_BASE = 0x11400000,
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EHCI_IRQ = 103,
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};
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static resource _ehci[] =
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{
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{ EHCI_BASE, EHCI_BASE + 0xfff, "ehci", IORESOURCE_MEM },
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{ EHCI_IRQ, EHCI_IRQ, "ehci-irq", IORESOURCE_IRQ },
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};
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static struct s5p_ehci_platdata _ehci_data;
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/**
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* EHCI controller
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*/
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struct Ehci : Genode::Mmio
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{
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Ehci(addr_t const mmio_base) : Mmio(mmio_base)
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{
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write<Cmd>(0);
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/* reset */
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write<Cmd::Reset>(1);
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while(read<Cmd::Reset>())
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msleep(1);
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}
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struct Cmd : Register<0x10, 32>
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{
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struct Reset : Bitfield<1, 1> { };
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};
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};
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/**
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* Gpio handling
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*/
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struct Gpio_bank {
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unsigned con;
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unsigned dat;
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};
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static inline
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unsigned con_mask(unsigned val) { return 0xf << ((val) << 2); }
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static inline
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unsigned con_sfr(unsigned x, unsigned v) { return (v) << ((x) << 2); }
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static void gpio_cfg_pin(Gpio_bank *bank, int gpio, int cfg)
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{
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unsigned int value;
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value = readl(&bank->con);
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value &= ~con_mask(gpio);
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value |= con_sfr(gpio, cfg);
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writel(value, &bank->con);
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}
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static void gpio_direction_output(Gpio_bank *bank, int gpio, int en)
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{
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unsigned int value;
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enum { GPIO_OUTPUT = 0x1 };
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gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
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value = readl(&bank->dat);
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value &= ~(0x1 << gpio);
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if (en)
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value |= 0x1 << gpio;
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writel(value, &bank->dat);
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}
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static void arndale_ehci_init()
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{
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enum Gpio_offset { D1 = 0x180, X3 = 0xc60 };
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/* reset hub via GPIO */
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Io_mem_connection io_gpio(GPIO_BASE, 0x1000);
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addr_t gpio_base = (addr_t)env()->rm_session()->attach(io_gpio.dataspace());
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Gpio_bank *d1 = reinterpret_cast<Gpio_bank *>(gpio_base + D1);
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Gpio_bank *x3 = reinterpret_cast<Gpio_bank *>(gpio_base + X3);
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/* hub reset */
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gpio_direction_output(x3, 5, 0);
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/* hub connect */
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gpio_direction_output(d1, 7, 0);
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gpio_direction_output(x3, 5, 1);
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gpio_direction_output(d1, 7, 1);
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env()->rm_session()->detach(gpio_base);
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/* reset ehci controller */
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Io_mem_connection io_ehci(EHCI_BASE, 0x1000);
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addr_t ehci_base = (addr_t)env()->rm_session()->attach(io_ehci.dataspace());
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Ehci ehci(ehci_base);
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env()->rm_session()->detach(ehci_base);
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}
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extern "C" void module_ehci_hcd_init();
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extern "C" int module_usbnet_init();
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extern "C" int module_asix_init();
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void platform_hcd_init(Services *services)
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{
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/* register network */
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if (services->nic) {
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module_usbnet_init();
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module_asix_init();
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}
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/* register EHCI controller */
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module_ehci_hcd_init();
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/* setup controller */
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arndale_ehci_init();
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/* setup EHCI-controller platform device */
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platform_device *pdev = (platform_device *)kzalloc(sizeof(platform_device), 0);
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pdev->name = "s5p-ehci";
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pdev->id = 0;
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pdev->num_resources = 2;
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pdev->resource = _ehci;
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pdev->dev.platform_data = &_ehci_data;
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/*needed for DMA buffer allocation. See 'hcd_buffer_alloc' in 'buffer.c' */
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static u64 dma_mask = ~(u64)0;
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pdev->dev.dma_mask = &dma_mask;
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pdev->dev.coherent_dma_mask = ~0;
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platform_device_register(pdev);
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}
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