451 lines
17 KiB
C
451 lines
17 KiB
C
//********************************************************************
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// MINIMUM ATA LOW LEVEL I/O DRIVER -- MINDRVR.H
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//
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// by Hale Landis (hlandis@ata-atapi.com)
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//
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// There is no copyright and there are no restrictions on the use
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// of this ATA Low Level I/O Driver code. It is distributed to
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// help other programmers understand how the ATA device interface
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// works and it is distributed without any warranty. Use this
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// code at your own risk.
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//
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// Minimum ATA Driver (MINDRVR) is a subset of ATADRVR. MINDRVR
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// has a single header file and a single C file. MINDRVR can
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// be used as the starting point for an ATADRVR for an embedded
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// system. NOTE all the places in the MINDRVR.H and MINDRVR.C files
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// where there is a comment containing the string "!!!".
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//
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// Use the header file mindrvr.h in any C files that call MINDRVR
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// functions.
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//
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// This code is based on the ATA/ATAPI-4,-5 and -6 standards and
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// on interviews with various ATA controller and drive designers.
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//
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// Note that MINDRVR does not support ATA CHS addressing.
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//
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// Most of the MINDRVR code is standard C code and should compile
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// using any C compiler. It has been tested using Borland C/C++ 4.5.
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//
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// This C source file is the header file for the driver
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// and is used in the MINDRVR.C files and must also be used
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// by any program using the MINDRVR code/functions.
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//********************************************************************
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#define MIN_ATA_DRIVER_VERSION "0H"
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//********************************************************************
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//
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// !!! What parts of MINDRVR do you want in your build?
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//
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//********************************************************************
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#define INCLUDE_ATA_DMA 1 // not zero to include ATA_DMA
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#define INCLUDE_ATAPI_PIO 1 // not zero to include ATAPI PIO
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#define INCLUDE_ATAPI_DMA 1 // not zero to include ATAPI DMA
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#ifdef __cplusplus
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extern "C" {
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#endif
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//********************************************************************
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//
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// !!! System specific functions and data you must supply
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//
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//********************************************************************
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// You must supply a function that waits for an interrupt from the
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// ATA controller. This function should return 0 when the interrupt
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// is received and a non zero value if the interrupt is not received
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// within the time out period.
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extern int SYSTEM_WAIT_INTR_OR_TIMEOUT( void );
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// You must supply a function that returns a system timer value. This
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// should be a value that increments at some constant rate.
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extern long SYSTEM_READ_TIMER( void );
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// This defines the number of system timer ticks per second.
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#define SYSTEM_TIMER_TICKS_PER_SECOND 1L
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//********************************************************************
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//
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// !!! ATA controller hardware specific data
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//
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//********************************************************************
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// ATA Command Block base address
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// (the address of the ATA Data register)
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#define PIO_BASE_ADDR1 ( (unsigned char *) 0x1000 )
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// ATA Control Block base address
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// (the address of the ATA DevCtrl
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// and AltStatus registers)
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#define PIO_BASE_ADDR2 ( (unsigned char *) 0x2000 )
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// BMIDE base address (address of
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// the BMIDE Command register for
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// the Primary or Secondary side of
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// the PCI ATA controller)
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#define PIO_BMIDE_BASE_ADDR ( (unsigned char *) 0x3000 )
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// Size of the ATA Data register - allowed values are 8, 16 and 32
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#define PIO_DEFAULT_XFER_WIDTH 16
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// Interrupts or polling mode - not zero to use interrrupts
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// Note: Interrupt mode is required for DMA
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#define INT_DEFAULT_INTERRUPT_MODE 0
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// Command time out in seconds
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#define TMR_TIME_OUT 20
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//**************************************************************
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//
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// Data that MINDRVR makes available.
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//
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//**************************************************************
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// public interrupt handler data
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extern unsigned char int_ata_status; // ATA status read by interrupt handler
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extern unsigned char int_bmide_status; // BMIDE status read by interrupt handler
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// Interrupt or Polling mode flag.
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extern unsigned char int_use_intr_flag; // not zero to use interrupts
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// ATA Data register width (8, 16 or 32)
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extern unsigned char pio_xfer_width;
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// Command and extended error information returned by the
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// reg_reset(), reg_non_data_*(), reg_pio_data_in_*(),
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// reg_pio_data_out_*(), reg_packet() and dma_pci_*() functions.
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struct REG_CMD_INFO
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{
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// command code
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unsigned char cmd; // command code
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// command parameters
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unsigned int fr; // feature (8 or 16 bits)
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unsigned int sc; // sec cnt (8 or 16 bits)
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unsigned int sn; // sec num (8 or 16 bits)
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unsigned int cl; // cyl low (8 or 16 bits)
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unsigned int ch; // cyl high (8 or 16 bits)
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unsigned char dh; // device head
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unsigned char dc; // device control
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long ns; // actual sector count
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int mc; // current multiple block setting
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unsigned char lbaSize; // size of LBA used
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#define LBACHS 0 // last command used ATA CHS (not supported by MINDRVR)
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// -or- last command was ATAPI PACKET command
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#define LBA28 28 // last command used ATA 28-bit LBA
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#define LBA48 48 // last command used ATA 48-bit LBA
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unsigned long lbaLow; // lower 32-bits of ATA LBA
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unsigned long lbaHigh; // upper 32-bits of ATA LBA
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// status and error regs
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unsigned char st; // status reg
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unsigned char as; // alt status reg
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unsigned char er ; // error reg
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// driver error codes
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unsigned char ec; // detailed error code
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unsigned char to; // not zero if time out error
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// additional result info
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long totalBytesXfer; // total bytes transfered
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long drqPackets; // number of PIO DRQ packets
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} ;
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extern struct REG_CMD_INFO reg_cmd_info;
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// Configuration data for device 0 and 1
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// returned by the reg_config() function.
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extern int reg_config_info[2];
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#define REG_CONFIG_TYPE_NONE 0
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#define REG_CONFIG_TYPE_UNKN 1
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#define REG_CONFIG_TYPE_ATA 2
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#define REG_CONFIG_TYPE_ATAPI 3
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//**************************************************************
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//
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// Global defines -- ATA register and register bits.
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// command block & control block regs
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//
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//**************************************************************
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// These are the offsets into pio_reg_addrs[]
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#define CB_DATA 0 // data reg in/out cmd_blk_base1+0
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#define CB_ERR 1 // error in cmd_blk_base1+1
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#define CB_FR 1 // feature reg out cmd_blk_base1+1
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#define CB_SC 2 // sector count in/out cmd_blk_base1+2
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#define CB_SN 3 // sector number in/out cmd_blk_base1+3
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#define CB_CL 4 // cylinder low in/out cmd_blk_base1+4
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#define CB_CH 5 // cylinder high in/out cmd_blk_base1+5
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#define CB_DH 6 // device head in/out cmd_blk_base1+6
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#define CB_STAT 7 // primary status in cmd_blk_base1+7
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#define CB_CMD 7 // command out cmd_blk_base1+7
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#define CB_ASTAT 8 // alternate status in ctrl_blk_base2+6
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#define CB_DC 8 // device control out ctrl_blk_base2+6
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// error reg (CB_ERR) bits
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#define CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
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#define CB_ER_BBK 0x80 // ATA bad block
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#define CB_ER_UNC 0x40 // ATA uncorrected error
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#define CB_ER_MC 0x20 // ATA media change
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#define CB_ER_IDNF 0x10 // ATA id not found
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#define CB_ER_MCR 0x08 // ATA media change request
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#define CB_ER_ABRT 0x04 // ATA command aborted
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#define CB_ER_NTK0 0x02 // ATA track 0 not found
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#define CB_ER_NDAM 0x01 // ATA address mark not found
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#define CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
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#define CB_ER_P_MCR 0x08 // ATAPI Media Change Request
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#define CB_ER_P_ABRT 0x04 // ATAPI command abort
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#define CB_ER_P_EOM 0x02 // ATAPI End of Media
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#define CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
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// ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
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#define CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
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#define CB_SC_P_REL 0x04 // ATAPI release
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#define CB_SC_P_IO 0x02 // ATAPI I/O
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#define CB_SC_P_CD 0x01 // ATAPI C/D
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// bits 7-4 of the device/head (CB_DH) reg
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#define CB_DH_LBA 0x40 // LBA bit
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#define CB_DH_DEV0 0x00 // select device 0
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#define CB_DH_DEV1 0x10 // select device 1
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// #define CB_DH_DEV0 0xa0 // select device 0 (old definition)
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// #define CB_DH_DEV1 0xb0 // select device 1 (old definition)
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// status reg (CB_STAT and CB_ASTAT) bits
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#define CB_STAT_BSY 0x80 // busy
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#define CB_STAT_RDY 0x40 // ready
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#define CB_STAT_DF 0x20 // device fault
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#define CB_STAT_WFT 0x20 // write fault (old name)
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#define CB_STAT_SKC 0x10 // seek complete (only SEEK command)
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#define CB_STAT_SERV 0x10 // service (overlap/queued commands)
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#define CB_STAT_DRQ 0x08 // data request
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#define CB_STAT_CORR 0x04 // corrected (obsolete)
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#define CB_STAT_IDX 0x02 // index (obsolete)
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#define CB_STAT_ERR 0x01 // error (ATA)
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#define CB_STAT_CHK 0x01 // check (ATAPI)
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// device control reg (CB_DC) bits
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#define CB_DC_HOB 0x80 // High Order Byte (48-bit LBA)
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// #define CB_DC_HD15 0x00 // bit 3 is reserved
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// #define CB_DC_HD15 0x08 // (old definition of bit 3)
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#define CB_DC_SRST 0x04 // soft reset
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#define CB_DC_NIEN 0x02 // disable interrupts
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//**************************************************************
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//
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// Most mandtory and optional ATA commands
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//
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//**************************************************************
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#define CMD_CFA_ERASE_SECTORS 0xC0
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#define CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
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#define CMD_CFA_TRANSLATE_SECTOR 0x87
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#define CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
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#define CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
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#define CMD_CHECK_POWER_MODE1 0xE5
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#define CMD_CHECK_POWER_MODE2 0x98
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#define CMD_DEVICE_RESET 0x08
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#define CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
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#define CMD_FLUSH_CACHE 0xE7
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#define CMD_FLUSH_CACHE_EXT 0xEA
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#define CMD_FORMAT_TRACK 0x50
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#define CMD_IDENTIFY_DEVICE 0xEC
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#define CMD_IDENTIFY_DEVICE_PACKET 0xA1
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#define CMD_IDENTIFY_PACKET_DEVICE 0xA1
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#define CMD_IDLE1 0xE3
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#define CMD_IDLE2 0x97
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#define CMD_IDLE_IMMEDIATE1 0xE1
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#define CMD_IDLE_IMMEDIATE2 0x95
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#define CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
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#define CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
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#define CMD_NOP 0x00
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#define CMD_PACKET 0xA0
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#define CMD_READ_BUFFER 0xE4
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#define CMD_READ_DMA 0xC8
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#define CMD_READ_DMA_EXT 0x25
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#define CMD_READ_DMA_QUEUED 0xC7
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#define CMD_READ_DMA_QUEUED_EXT 0x26
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#define CMD_READ_MULTIPLE 0xC4
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#define CMD_READ_MULTIPLE_EXT 0x29
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#define CMD_READ_SECTORS 0x20
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#define CMD_READ_SECTORS_EXT 0x24
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#define CMD_READ_VERIFY_SECTORS 0x40
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#define CMD_READ_VERIFY_SECTORS_EXT 0x42
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#define CMD_RECALIBRATE 0x10
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#define CMD_SEEK 0x70
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#define CMD_SET_FEATURES 0xEF
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#define CMD_SET_MULTIPLE_MODE 0xC6
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#define CMD_SLEEP1 0xE6
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#define CMD_SLEEP2 0x99
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#define CMD_SMART 0xB0
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#define CMD_STANDBY1 0xE2
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#define CMD_STANDBY2 0x96
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#define CMD_STANDBY_IMMEDIATE1 0xE0
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#define CMD_STANDBY_IMMEDIATE2 0x94
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#define CMD_WRITE_BUFFER 0xE8
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#define CMD_WRITE_DMA 0xCA
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#define CMD_WRITE_DMA_EXT 0x35
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#define CMD_WRITE_DMA_QUEUED 0xCC
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#define CMD_WRITE_DMA_QUEUED_EXT 0x36
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#define CMD_WRITE_MULTIPLE 0xC5
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#define CMD_WRITE_MULTIPLE_EXT 0x39
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#define CMD_WRITE_SECTORS 0x30
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#define CMD_WRITE_SECTORS_EXT 0x34
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#define CMD_WRITE_VERIFY 0x3C
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//**************************************************************
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//
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// ATA and ATAPI PIO support functions
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//
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//**************************************************************
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// config and reset funcitons
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extern int reg_config( void );
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extern int reg_reset( unsigned char devRtrn );
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// ATA Non-Data command funnctions (for LBA28 and LBA48)
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extern int reg_non_data_lba28( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lba );
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extern int reg_non_data_lba48( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lbahi, unsigned long lbalo );
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// ATA PIO Data In command functions (for LBA28 and LBA48)
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extern int reg_pio_data_in_lba28( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lba,
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unsigned char * bufAddr,
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long numSect, int multiCnt );
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extern int reg_pio_data_in_lba48( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lbahi, unsigned long lbalo,
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unsigned char * bufAddr,
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long numSect, int multiCnt );
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// ATA PIO Data Out command functions (for LBA28 and LBA48)
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extern int reg_pio_data_out_lba28( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lba,
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unsigned char * bufAddr,
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long numSect, int multiCnt );
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extern int reg_pio_data_out_lba48( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lbahi, unsigned long lbalo,
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unsigned char * bufAddr,
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long numSect, int multiCnt );
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#if INCLUDE_ATAPI_PIO
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// ATAPI Packet PIO function
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extern int reg_packet( unsigned char dev,
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unsigned int cpbc,
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unsigned char * cdbBufAddr,
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int dir,
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long dpbc,
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unsigned char * dataBufAddr );
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#endif // INCLUDE_ATAPI_PIO
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//**************************************************************
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//
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// ATA and ATAPI DMA support functions
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//
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//**************************************************************
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#if INCLUDE_ATA_DMA || INCLUDE_ATAPI_DMA
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// BMIDE registers and bits
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#define BM_COMMAND_REG 0 // offset to BM command reg
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#define BM_CR_MASK_READ 0x00 // read from memory
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#define BM_CR_MASK_WRITE 0x08 // write to memory
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#define BM_CR_MASK_START 0x01 // start transfer
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#define BM_CR_MASK_STOP 0x00 // stop transfer
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#define BM_STATUS_REG 2 // offset to BM status reg
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#define BM_SR_MASK_SIMPLEX 0x80 // simplex only
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#define BM_SR_MASK_DRV1 0x40 // drive 1 can do dma
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#define BM_SR_MASK_DRV0 0x20 // drive 0 can do dma
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#define BM_SR_MASK_INT 0x04 // INTRQ signal asserted
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#define BM_SR_MASK_ERR 0x02 // error
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#define BM_SR_MASK_ACT 0x01 // active
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#define BM_PRD_ADDR_LOW 4 // offset to BM prd addr reg low 16 bits
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#define BM_PRD_ADDR_HIGH 6 // offset to BM prd addr reg high 16 bits
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#define MAX_TRANSFER_SIZE 262144L // max transfer size (in bytes,
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// should be multiple of 65536)
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#define MAX_SEG ((MAX_TRANSFER_SIZE/65536L)+2L) // number physical segments
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#define MAX_PRD (MAX_SEG*4L) // number of PRDs required
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#define PRD_BUF_SIZE (48+(2*MAX_PRD*8)) // size of PRD list buffer
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// PCI DMA setup function (usually called once).
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// !!! You may not need this function in your system - see the comments
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// !!! for this function in MINDRVR.C.
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extern int dma_pci_config( void );
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// ATA DMA functions
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extern int dma_pci_lba28( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lba,
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unsigned char * bufAddr,
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long numSect );
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extern int dma_pci_lba48( unsigned char dev, unsigned char cmd,
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unsigned int fr, unsigned int sc,
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unsigned long lbahi, unsigned long lbalo,
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unsigned char * bufAddr,
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long numSect );
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#endif // INCLUDE_ATA_DMA or INCLUDE_ATAPI_DMA
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#if INCLUDE_ATAPI_DMA
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// ATA DMA function
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extern int dma_pci_packet( unsigned char dev,
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unsigned int cpbc,
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unsigned char * cdbBufAddr,
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int dir,
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long dpbc,
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unsigned char * dataBufAddr );
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif // INCLUDE_ATAPI_DMA
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// end mindrvr.h
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