408 lines
10 KiB
C++
408 lines
10 KiB
C++
/*
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* \brief RISCV Sv39 page table format
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* \author Sebastian Sumpf
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* \date 2015-08-04
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _SRC__LIB__HW__SPEC__RISCV__PAGE_TABLE_H_
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#define _SRC__LIB__HW__SPEC__RISCV__PAGE_TABLE_H_
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#include <base/log.h>
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#include <hw/page_flags.h>
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#include <hw/page_table_allocator.h>
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#include <util/misc_math.h>
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#include <util/register.h>
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namespace Sv39
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{
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using namespace Genode;
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enum {
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SIZE_LOG2_4K = 12,
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SIZE_LOG2_2M = 21,
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SIZE_LOG2_1G = 30,
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SIZE_LOG2_512G = 39,
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};
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struct None { };
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template <typename ENTRY, unsigned BLOCK_SIZE_LOG2, unsigned SIZE_LOG2>
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class Level_x_translation_table;
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using Level_3_translation_table =
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Level_x_translation_table<None, SIZE_LOG2_4K, SIZE_LOG2_2M>;
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using Level_2_translation_table =
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Level_x_translation_table<Level_3_translation_table, SIZE_LOG2_2M, SIZE_LOG2_1G>;
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using Level_1_translation_table =
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Level_x_translation_table<Level_2_translation_table, SIZE_LOG2_1G, SIZE_LOG2_512G>;
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struct Descriptor;
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struct Table_descriptor;
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struct Block_descriptor;
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}
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struct Sv39::Descriptor : Register<64>
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{
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enum Descriptor_type { INVALID, TABLE, BLOCK };
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struct V : Bitfield<0, 1> { }; /* present */
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struct R : Bitfield<1, 1> { }; /* read */
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struct W : Bitfield<2, 1> { }; /* write */
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struct X : Bitfield<3, 1> { }; /* executable */
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struct U : Bitfield<4, 1> { }; /* user */
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struct G : Bitfield<5, 1> { }; /* global */
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struct Perm : Bitfield<0, 5> { };
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struct Type : Bitfield<1, 3>
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{
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enum {
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POINTER = 0
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};
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};
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struct Ppn : Bitfield<10, 38> { }; /* physical address 10 bit aligned */
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struct Base : Bitfield<12, 38> { }; /* physical address page aligned */
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static access_t permission_bits(Hw::Page_flags const &f)
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{
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access_t rights = 0;
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R::set(rights, 1);
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if (f.writeable)
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W::set(rights, 1);
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if (f.executable)
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X::set(rights, 1);
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if (!f.privileged)
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U::set(rights, 1);
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if (f.global)
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G::set(rights, 1);
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return rights;
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}
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static Descriptor_type type(access_t const v)
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{
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if (!V::get(v)) return INVALID;
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if (Type::get(v) == Type::POINTER)
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return TABLE;
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return BLOCK;
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}
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static bool valid(access_t const v) {
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return V::get(v); }
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};
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struct Sv39::Table_descriptor : Descriptor
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{
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static access_t create(void * const pa)
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{
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access_t base = Base::get((access_t)pa);
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access_t desc = 0;
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Ppn::set(desc, base);
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Type::set(desc, Type::POINTER);
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V::set(desc, 1);
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return desc;
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}
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};
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struct Sv39::Block_descriptor : Descriptor
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{
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static access_t create(Hw::Page_flags const &f, addr_t const pa)
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{
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access_t base = Base::get(pa);
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access_t desc = 0;
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Ppn::set(desc, base);
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Perm::set(desc, permission_bits(f));
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V::set(desc, 1);
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return desc;
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}
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};
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template <typename ENTRY, unsigned BLOCK_SIZE_LOG2, unsigned SIZE_LOG2>
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class Sv39::Level_x_translation_table
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{
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private:
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bool _aligned(addr_t const a, size_t const alignm_log2) {
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return a == ((a >> alignm_log2) << alignm_log2); }
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void _translation_added(addr_t, size_t);
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public:
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static constexpr size_t MIN_PAGE_SIZE_LOG2 = SIZE_LOG2_4K;
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static constexpr size_t ALIGNM_LOG2 = SIZE_LOG2_4K;
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static constexpr size_t MAX_ENTRIES = 1 << (SIZE_LOG2 - BLOCK_SIZE_LOG2);
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static constexpr size_t BLOCK_SIZE = 1 << BLOCK_SIZE_LOG2;
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static constexpr size_t BLOCK_MASK = ~(BLOCK_SIZE - 1);
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static constexpr size_t VM_MASK = (1UL<< SIZE_LOG2_512G) - 1;
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class Misaligned { };
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class Invalid_range { };
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class Double_insertion { };
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using Allocator = Hw::Page_table_allocator<4096>;
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protected:
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typename Descriptor::access_t _entries[MAX_ENTRIES];
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/*
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* Return how many entries of an alignment fit into region
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*/
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static constexpr size_t _count(size_t region, size_t alignment) {
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return align_addr<size_t>(region, alignment) / (1UL << alignment); }
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template <typename FUNC>
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void _range_op(addr_t vo, addr_t pa, size_t size, FUNC &&func)
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{
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/* sanity check vo bits 38 to 63 must be equal */
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addr_t sanity = vo >> 38;
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if (sanity != 0 && sanity != 0x3ffffff) {
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Genode::error("invalid virtual address: ", vo);
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throw Invalid_range();
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}
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/* clear bits 39 - 63 */
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vo &= VM_MASK;
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for (size_t i = vo >> BLOCK_SIZE_LOG2; size > 0;
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i = vo >> BLOCK_SIZE_LOG2) {
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addr_t end = (vo + BLOCK_SIZE) & BLOCK_MASK;
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size_t sz = min(size, end-vo);
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func(vo, pa, sz, _entries[i]);
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/* flush cached table entry address */
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_translation_added((addr_t)&_entries[i], sz);
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/* check whether we wrap */
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if (end < vo) return;
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size = size - sz;
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vo += sz;
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pa += sz;
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}
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}
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template <typename E>
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struct Insert_func
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{
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Hw::Page_flags const & flags;
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Allocator & alloc;
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Insert_func(Hw::Page_flags const & flags, Allocator & alloc)
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: flags(flags), alloc(alloc) { }
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void operator () (addr_t const vo,
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addr_t const pa,
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size_t const size,
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typename Descriptor::access_t &desc)
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{
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using Td = Table_descriptor;
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/* can we insert a whole block? */
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if (!((vo & ~BLOCK_MASK) || (pa & ~BLOCK_MASK) || size < BLOCK_SIZE)) {
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typename Descriptor::access_t blk_desc =
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Block_descriptor::create(flags, pa);
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if (Descriptor::valid(desc) && desc != blk_desc)
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throw Double_insertion();
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desc = blk_desc;
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return;
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}
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/* we need to use a next level table */
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switch (Descriptor::type(desc)) {
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case Descriptor::INVALID: /* no entry */
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{
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/* create and link next level table */
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E & table = alloc.construct<E>();
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desc = Td::create((void*)alloc.phys_addr(table));
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}
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case Descriptor::TABLE: /* table already available */
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{
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/* use allocator to retrieve virt address of table */
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E & table = alloc.virt_addr<E>(Td::Base::bits(Td::Ppn::get(desc)));
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table.insert_translation(vo - (vo & BLOCK_MASK),
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pa, size, flags, alloc);
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break;
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}
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case Descriptor::BLOCK: /* there is already a block */
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throw Double_insertion();
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};
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}
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};
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template <typename E>
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struct Remove_func
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{
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Allocator & alloc;
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Remove_func(Allocator & alloc) : alloc(alloc) { }
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void operator () (addr_t const vo,
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addr_t const /* pa */,
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size_t const size,
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typename Descriptor::access_t &desc)
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{
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using Td = Table_descriptor;
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switch (Descriptor::type(desc)) {
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case Descriptor::TABLE:
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{
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/* use allocator to retrieve virt address of table */
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E & table = alloc.virt_addr<E>(Td::Base::bits(Td::Ppn::get(desc)));
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table.remove_translation(vo - (vo & BLOCK_MASK), size, alloc);
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if (!table.empty()) break;
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alloc.destruct<E>(table);
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}
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case Descriptor::BLOCK:
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case Descriptor::INVALID:
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desc = 0;
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}
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}
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};
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public:
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Level_x_translation_table()
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{
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if (!_aligned((addr_t)this, ALIGNM_LOG2)) {
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Genode::warning("misaligned address");
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throw Misaligned();
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}
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memset(&_entries, 0, sizeof(_entries));
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}
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bool empty()
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{
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for (unsigned i = 0; i < MAX_ENTRIES; i++)
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if (Descriptor::valid(_entries[i]))
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return false;
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return true;
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}
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/**
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* Insert translations into this table
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*
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* \param vo offset of the virtual region represented
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* by the translation within the virtual
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* region represented by this table
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* \param pa base of the physical backing store
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* \param size size of the translated region
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* \param flags mapping flags
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* \param alloc level allocator
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*/
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void insert_translation(addr_t vo, addr_t pa, size_t size,
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Hw::Page_flags const & flags,
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Allocator & alloc )
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{
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_range_op(vo, pa, size, Insert_func<ENTRY>(flags, alloc));
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}
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/**
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* Remove translations that overlap with a given virtual region
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*
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* \param vo region offset within the tables virtual region
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* \param size region size
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* \param alloc level allocator
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*/
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void remove_translation(addr_t vo, size_t size, Allocator & alloc)
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{
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_range_op(vo, 0, size, Remove_func<ENTRY>(alloc));
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}
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} __attribute__((aligned(1 << ALIGNM_LOG2)));
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namespace Sv39 {
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/**
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* Insert/Remove functor specialization for level 3
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*/
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template <> template <>
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struct Level_3_translation_table::Insert_func<None>
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{
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Hw::Page_flags const & flags;
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Insert_func(Hw::Page_flags const & flags, Allocator &)
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: flags(flags) { }
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void operator () (addr_t const vo,
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addr_t const pa,
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size_t const size,
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Descriptor::access_t &desc)
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{
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if ((vo & ~BLOCK_MASK) || (pa & ~BLOCK_MASK) ||
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size < BLOCK_SIZE) {
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Genode::warning("invalid range");
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throw Invalid_range();
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}
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Descriptor::access_t blk_desc =
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Block_descriptor::create(flags, pa);
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if (Descriptor::valid(desc) && desc != blk_desc)
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throw Double_insertion();
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desc = blk_desc;
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}
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};
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template <> template <>
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struct Level_3_translation_table::Remove_func<None>
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{
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Remove_func(Allocator &) { }
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void operator () (addr_t /* vo */,
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addr_t /* pa */,
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size_t /* size */,
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Descriptor::access_t &desc) {
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desc = 0; }
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};
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}
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namespace Hw {
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struct Page_table : Sv39::Level_1_translation_table
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{
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enum {
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TABLE_LEVEL_X_SIZE_LOG2 = Sv39::SIZE_LOG2_4K,
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CORE_VM_AREA_SIZE = 128 * 1024 * 1024,
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CORE_TRANS_TABLE_COUNT =
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_count(CORE_VM_AREA_SIZE, Sv39::SIZE_LOG2_1G) +
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_count(CORE_VM_AREA_SIZE, Sv39::SIZE_LOG2_2M),
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};
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Page_table() : Sv39::Level_1_translation_table() {}
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Page_table(Page_table & kernel_table)
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: Sv39::Level_1_translation_table() {
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static unsigned first = (0xffffffc000000000UL & VM_MASK) >> Sv39::SIZE_LOG2_1G;
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for (unsigned i = first; i < MAX_ENTRIES; i++)
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_entries[i] = kernel_table._entries[i]; }
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};
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}
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#endif /* _SRC__LIB__HW__SPEC__RISCV__PAGE_TABLE_H_ */
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