34 lines
973 B
C++
34 lines
973 B
C++
/*
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* \brief CPU driver for core Arm Cortex A8 specific implementation
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* \author Martin stein
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* \author Stefan Kalkowski
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* \date 2015-12-14
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#include <cpu.h>
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#include <kernel/kernel.h>
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#include <kernel/cpu.h>
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void Genode::Cpu::translation_added(Genode::addr_t const base,
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Genode::size_t const size)
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{
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using namespace Kernel;
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/*
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* The Cortex-A8 CPU can't use the L1 cache on page-table
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* walks. Therefore, as the page-tables lie in write-back cacheable
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* memory we've to clean the corresponding cache-lines even when a
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* page table entry is added. We only do this as core as the kernel
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* adds translations solely before MMU and caches are enabled.
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*/
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Cpu::clean_invalidate_data_cache_by_virt_region(base, size);
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}
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