8393ac6895
* Introduces Schedule_context * Use fast-interrupts or normal interrupts * Add mode-transition between secure/non-secure world * Limit system resources for Genode apps due to non-secure world This commit implements the newly introduced Vm session interface to be used on top of TrustZone capable Armv7 CPUs. Therefore a new Schedule_context is introduced in the kernel. Threads and Vms are both Schedule_contexts used by the scheduler. In contrast to a thread a vm uses a different assembler mode switch to the non-secure, virtual world, as well as another exception is used, when the non-secure world is left. For both worlds to co-exist the interrupt-controller needs to be configured, so that the secure (Genode) world uses fast-interrupts only, and the non-secure world only legacy interrupts. The only TrustZone capable platform the base-hw kernel works on top of is the CoreTile Express 9x4 for the Versatile Express motherboard. For a virtual machine working properly on top some platform resources must be reserved. Therefore there exist two flavours of this platform now, one with the 'trustzone' spec-variable enabled, and one without. If 'trustzone' is specified most platform resources (DDR-RAM, and most IRQs) are reserved for the Vm and not available to the secure Genode world.
76 lines
1.7 KiB
C++
76 lines
1.7 KiB
C++
/*
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* \brief CPU state
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* \author Norman Feske
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* \author Stefan Kalkowski
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* \date 2011-05-06
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*/
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/*
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* Copyright (C) 2011-2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _INCLUDE__ARM__CPU__CPU_STATE_H_
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#define _INCLUDE__ARM__CPU__CPU_STATE_H_
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#include <base/stdint.h>
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namespace Genode {
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struct Cpu_state
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{
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/**
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* Native exception types
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*/
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enum Cpu_exception {
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RESET,
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UNDEFINED_INSTRUCTION,
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SUPERVISOR_CALL,
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PREFETCH_ABORT,
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DATA_ABORT,
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INTERRUPT_REQUEST,
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FAST_INTERRUPT_REQUEST,
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MAX_CPU_EXCEPTION,
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};
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enum { MAX_GPR = 13 };
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addr_t r[MAX_GPR]; /* r0-r12 - general purpose */
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addr_t sp; /* r13 - stack pointer */
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addr_t lr; /* r14 - link register */
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addr_t ip; /* r15 - instruction pointer */
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addr_t cpsr; /* current program status register */
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Cpu_exception cpu_exception; /* last exception */
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};
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struct Cpu_state_modes : Cpu_state
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{
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/**
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* Common banked registers for exception modes
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*/
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struct Mode_state {
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enum Mode {
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UND, /* Undefined */
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SVC, /* Supervisor */
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ABORT, /* Abort */
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IRQ, /* Interrupt */
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FIQ, /* Fast Interrupt */
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MAX
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};
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addr_t spsr; /* saved program status register */
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addr_t sp; /* banked stack pointer */
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addr_t lr; /* banked link register */
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};
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Mode_state mode[Mode_state::MAX]; /* exception mode registers */
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addr_t fiq_r[5]; /* fast-interrupt mode r8-r12 */
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};
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}
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#endif /* _INCLUDE__ARM__CPU__CPU_STATE_H_ */
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