36 lines
1.1 KiB
Diff
36 lines
1.1 KiB
Diff
From b74e427801f045578c401a140a8e66404bb3ff19 Mon Sep 17 00:00:00 2001
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From: Christian Prochaska <christian.prochaska@genode-labs.com>
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Date: Tue, 12 Feb 2019 19:54:06 +0100
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Subject: [PATCH 14/15] Always enable user mode access for performance monitors
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QEMU implements the cycle count register read by
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'Genode::Trace::timestamp()', but does not report a supported debug model
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version for Cortex-A9.
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---
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kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp | 9 +++++++--
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1 file changed, 7 insertions(+), 2 deletions(-)
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diff --git a/kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp b/kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp
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index b7d6a935..bff54286 100644
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--- a/kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp
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+++ b/kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp
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@@ -190,8 +190,13 @@ PUBLIC static FIASCO_INIT_CPU
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void
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Perf_cnt::init_cpu()
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{
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- if (!is_avail())
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- return;
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+ /*
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+ * QEMU implements the cycle count register read by
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+ * 'Genode::Trace::timestamp()', but does not report a supported debug model
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+ * version for Cortex-A9.
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+ */
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+ //if (!is_avail())
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+ //return;
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_nr_counters = (pmcr() >> 11) & 0x1f;
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--
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2.11.0
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