This commit adds rocket core on the Zynq FPGA support to base HW. It also takes advantage of the new timer infrastructure introduced with the privileged 1.8 and adds improved TLB flush support. fixes #1880
28 lines
597 B
C++
28 lines
597 B
C++
/*
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* \brief CPU core implementation
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* \author Sebastian Sumpf
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* \date 2016-02-10
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*/
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/*
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* Copyright (C) 2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode includes */
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#include <base/printf.h>
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#include <kernel/interface.h>
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/* Core includes */
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#include <cpu.h>
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#include <machine_call.h>
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void Genode::Cpu::translation_added(addr_t const addr, size_t const size)
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{
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if (Machine::is_user_mode())
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Kernel::update_data_region(addr, size);
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else Genode::Cpu::sfence();
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}
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